From patchwork Thu Aug 27 08:22:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yifei Jiang X-Patchwork-Id: 11740281 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DADC414E5 for ; Thu, 27 Aug 2020 08:24:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C9E2320738 for ; Thu, 27 Aug 2020 08:24:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728246AbgH0IXw (ORCPT ); Thu, 27 Aug 2020 04:23:52 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:45808 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726395AbgH0IXv (ORCPT ); Thu, 27 Aug 2020 04:23:51 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 6322BE11D85A99240666; Thu, 27 Aug 2020 16:23:48 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 16:23:42 +0800 From: Yifei Jiang To: , , , , , , CC: , , , , , , , , , Yifei Jiang Subject: [PATCH RFC 1/2] riscv/kvm: Fix use VSIP_VALID_MASK mask HIP register Date: Thu, 27 Aug 2020 16:22:50 +0800 Message-ID: <20200827082251.1591-2-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827082251.1591-1-jiangyifei@huawei.com> References: <20200827082251.1591-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The correct sip/sie 0x222 could mask wrong 0x000 by VSIP_VALID_MASK, This patch fix it. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- arch/riscv/kvm/vcpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index adb0815951aa..2976666e921f 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -419,8 +419,8 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu, if (reg_num == KVM_REG_RISCV_CSR_REG(sip) || reg_num == KVM_REG_RISCV_CSR_REG(sie)) { - reg_val = reg_val << VSIP_TO_HVIP_SHIFT; reg_val = reg_val & VSIP_VALID_MASK; + reg_val = reg_val << VSIP_TO_HVIP_SHIFT; } ((unsigned long *)csr)[reg_num] = reg_val;