diff mbox series

[kvm-unit-tests,2/2] arm64: Check if the configured translation granule is supported

Message ID 20201102113444.103536-3-nikos.nikoleris@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64: Add support for configuring the translation granule | expand

Commit Message

Nikos Nikoleris Nov. 2, 2020, 11:34 a.m. UTC
Now that we can change the translation granule at will, and since
arm64 implementations can support a subset of the architecturally
defined granules, we need to check and warn the user if the configured
granule is not supported.

Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
---
 lib/arm64/asm/processor.h | 65 +++++++++++++++++++++++++++++++++++++++
 lib/arm/mmu.c             |  3 ++
 2 files changed, 68 insertions(+)

Comments

Andrew Jones Nov. 3, 2020, 10:02 a.m. UTC | #1
On Mon, Nov 02, 2020 at 11:34:44AM +0000, Nikos Nikoleris wrote:
> Now that we can change the translation granule at will, and since
> arm64 implementations can support a subset of the architecturally
> defined granules, we need to check and warn the user if the configured
> granule is not supported.

nit: it'd be better for this patch to come before the last patch.

> 
> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
> ---
>  lib/arm64/asm/processor.h | 65 +++++++++++++++++++++++++++++++++++++++
>  lib/arm/mmu.c             |  3 ++
>  2 files changed, 68 insertions(+)
> 
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 02665b8..0eac928 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -117,5 +117,70 @@ static inline u64 get_ctr(void)
>  
>  extern u32 dcache_line_size;
>  
> +static inline unsigned long get_id_aa64mmfr0_el1(void)
> +{
> +	unsigned long mmfr0;
> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
> +	return mmfr0;
> +}
> +
> +/* From arch/arm64/include/asm/cpufeature.h */
> +static inline unsigned int
> +cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
> +{
> +	return (u64)(features << (64 - width - field)) >> (64 - width);
> +}
> +
> +#define ID_AA64MMFR0_TGRAN4_SHIFT	28
> +#define ID_AA64MMFR0_TGRAN64_SHIFT	24
> +#define ID_AA64MMFR0_TGRAN16_SHIFT	20
> +#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
> +#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
> +#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
> +
> +static inline bool system_supports_64kb_granule(void)
> +{
> +	u64 mmfr0;
> +	u32 val;
> +
> +	mmfr0 = get_id_aa64mmfr0_el1();
> +	val = cpuid_feature_extract_unsigned_field_width(
> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT,4);
> +
> +	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
> +}
> +
> +static inline bool system_supports_16kb_granule(void)
> +{
> +	u64 mmfr0;
> +	u32 val;
> +
> +	mmfr0 = get_id_aa64mmfr0_el1();
> +	val = cpuid_feature_extract_unsigned_field_width(
> +		mmfr0, ID_AA64MMFR0_TGRAN16_SHIFT, 4);
> +
> +	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
> +}
> +
> +static inline bool system_supports_4kb_granule(void)
> +{
> +	u64 mmfr0;
> +	u32 val;
> +
> +	mmfr0 = get_id_aa64mmfr0_el1();
> +	val = cpuid_feature_extract_unsigned_field_width(
> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT, 4);
> +
> +	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
> +}
> +
> +#if PAGE_SIZE == 65536
> +#define system_supports_configured_granule system_supports_64kb_granule
> +#elif PAGE_SIZE == 16384
> +#define system_supports_configured_granule system_supports_16kb_granule
> +#elif PAGE_SIZE == 4096
> +#define system_supports_configured_granule system_supports_4kb_granule
> +#endif
> +
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM64_PROCESSOR_H_ */
> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> index 6d1c75b..51fa745 100644
> --- a/lib/arm/mmu.c
> +++ b/lib/arm/mmu.c
> @@ -163,6 +163,9 @@ void *setup_mmu(phys_addr_t phys_end)
>  
>  #ifdef __aarch64__
>  	init_alloc_vpage((void*)(4ul << 30));
> +
> +	assert_msg(system_supports_configured_granule(),
> +		   "Unsupported translation granule %d\n", PAGE_SIZE);
                                                     ^
                                              needs '%ld' to compile
>  #endif
>  
>  	mmu_idmap = alloc_page();
> -- 
> 2.17.1
>

I don't think we need the three separate functions. How about just
doing the following diff?

Thanks,
drew


diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
index 540a1e842d5b..fef62f5a9866 100644
--- a/lib/arm/mmu.c
+++ b/lib/arm/mmu.c
@@ -160,6 +160,9 @@ void *setup_mmu(phys_addr_t phys_end)
 
 #ifdef __aarch64__
 	init_alloc_vpage((void*)(4ul << 30));
+
+	assert_msg(system_supports_granule(PAGE_SIZE),
+		   "Unsupported translation granule: %ld\n", PAGE_SIZE);
 #endif
 
 	mmu_idmap = alloc_page();
diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
index 02665b84cc7e..dc493d1686bc 100644
--- a/lib/arm64/asm/processor.h
+++ b/lib/arm64/asm/processor.h
@@ -117,5 +117,21 @@ static inline u64 get_ctr(void)
 
 extern u32 dcache_line_size;
 
+static inline unsigned long get_id_aa64mmfr0_el1(void)
+{
+	unsigned long mmfr0;
+	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
+	return mmfr0;
+}
+
+static inline bool system_supports_granule(size_t granule)
+{
+	u64 mmfr0 = get_id_aa64mmfr0_el1();
+
+	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
+		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
+		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
+}
+
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASMARM64_PROCESSOR_H_ */
Nikos Nikoleris Nov. 3, 2020, 10:21 a.m. UTC | #2
Hi Drew,

On 03/11/2020 10:02, Andrew Jones wrote:
> On Mon, Nov 02, 2020 at 11:34:44AM +0000, Nikos Nikoleris wrote:
>> Now that we can change the translation granule at will, and since
>> arm64 implementations can support a subset of the architecturally
>> defined granules, we need to check and warn the user if the configured
>> granule is not supported.
> 
> nit: it'd be better for this patch to come before the last patch.
>

Ack, I will re-order them.

>>
>> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
>> ---
>>   lib/arm64/asm/processor.h | 65 +++++++++++++++++++++++++++++++++++++++
>>   lib/arm/mmu.c             |  3 ++
>>   2 files changed, 68 insertions(+)
>>
>> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
>> index 02665b8..0eac928 100644
>> --- a/lib/arm64/asm/processor.h
>> +++ b/lib/arm64/asm/processor.h
>> @@ -117,5 +117,70 @@ static inline u64 get_ctr(void)
>>   
>>   extern u32 dcache_line_size;
>>   
>> +static inline unsigned long get_id_aa64mmfr0_el1(void)
>> +{
>> +	unsigned long mmfr0;
>> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
>> +	return mmfr0;
>> +}
>> +
>> +/* From arch/arm64/include/asm/cpufeature.h */
>> +static inline unsigned int
>> +cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
>> +{
>> +	return (u64)(features << (64 - width - field)) >> (64 - width);
>> +}
>> +
>> +#define ID_AA64MMFR0_TGRAN4_SHIFT	28
>> +#define ID_AA64MMFR0_TGRAN64_SHIFT	24
>> +#define ID_AA64MMFR0_TGRAN16_SHIFT	20
>> +#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
>> +#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
>> +#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
>> +
>> +static inline bool system_supports_64kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT,4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
>> +}
>> +
>> +static inline bool system_supports_16kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN16_SHIFT, 4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
>> +}
>> +
>> +static inline bool system_supports_4kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT, 4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
>> +}
>> +
>> +#if PAGE_SIZE == 65536
>> +#define system_supports_configured_granule system_supports_64kb_granule
>> +#elif PAGE_SIZE == 16384
>> +#define system_supports_configured_granule system_supports_16kb_granule
>> +#elif PAGE_SIZE == 4096
>> +#define system_supports_configured_granule system_supports_4kb_granule
>> +#endif
>> +
>>   #endif /* !__ASSEMBLY__ */
>>   #endif /* _ASMARM64_PROCESSOR_H_ */
>> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
>> index 6d1c75b..51fa745 100644
>> --- a/lib/arm/mmu.c
>> +++ b/lib/arm/mmu.c
>> @@ -163,6 +163,9 @@ void *setup_mmu(phys_addr_t phys_end)
>>   
>>   #ifdef __aarch64__
>>   	init_alloc_vpage((void*)(4ul << 30));
>> +
>> +	assert_msg(system_supports_configured_granule(),
>> +		   "Unsupported translation granule %d\n", PAGE_SIZE);
>                                                       ^
>                                                needs '%ld' to compile
>>   #endif
>>   
>>   	mmu_idmap = alloc_page();
>> -- 
>> 2.17.1
>>
> 
> I don't think we need the three separate functions. How about just
> doing the following diff?
>

Makes sense, I was looking at how we do it in the kernel and got carried 
away. We don't need to do that much at compile time.

Thanks for the review, I will included your suggestions in v3.

Thanks,

Nikos

> Thanks,
> drew
> 
> 
> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> index 540a1e842d5b..fef62f5a9866 100644
> --- a/lib/arm/mmu.c
> +++ b/lib/arm/mmu.c
> @@ -160,6 +160,9 @@ void *setup_mmu(phys_addr_t phys_end)
>   
>   #ifdef __aarch64__
>   	init_alloc_vpage((void*)(4ul << 30));
> +
> +	assert_msg(system_supports_granule(PAGE_SIZE),
> +		   "Unsupported translation granule: %ld\n", PAGE_SIZE);
>   #endif
>   
>   	mmu_idmap = alloc_page();
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 02665b84cc7e..dc493d1686bc 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -117,5 +117,21 @@ static inline u64 get_ctr(void)
>   
>   extern u32 dcache_line_size;
>   
> +static inline unsigned long get_id_aa64mmfr0_el1(void)
> +{
> +	unsigned long mmfr0;
> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
> +	return mmfr0;
> +}
> +
> +static inline bool system_supports_granule(size_t granule)
> +{
> +	u64 mmfr0 = get_id_aa64mmfr0_el1();
> +
> +	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
> +		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
> +		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
> +}
> +
>   #endif /* !__ASSEMBLY__ */
>   #endif /* _ASMARM64_PROCESSOR_H_ */
>
Alexandru Elisei Nov. 3, 2020, 5:03 p.m. UTC | #3
Hi,

On 11/3/20 10:02 AM, Andrew Jones wrote:
> On Mon, Nov 02, 2020 at 11:34:44AM +0000, Nikos Nikoleris wrote:
>> Now that we can change the translation granule at will, and since
>> arm64 implementations can support a subset of the architecturally
>> defined granules, we need to check and warn the user if the configured
>> granule is not supported.
> nit: it'd be better for this patch to come before the last patch.
>
>> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
>> ---
>>  lib/arm64/asm/processor.h | 65 +++++++++++++++++++++++++++++++++++++++
>>  lib/arm/mmu.c             |  3 ++
>>  2 files changed, 68 insertions(+)
>>
>> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
>> index 02665b8..0eac928 100644
>> --- a/lib/arm64/asm/processor.h
>> +++ b/lib/arm64/asm/processor.h
>> @@ -117,5 +117,70 @@ static inline u64 get_ctr(void)
>>  
>>  extern u32 dcache_line_size;
>>  
>> +static inline unsigned long get_id_aa64mmfr0_el1(void)
>> +{
>> +	unsigned long mmfr0;
>> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
>> +	return mmfr0;
>> +}
>> +
>> +/* From arch/arm64/include/asm/cpufeature.h */
>> +static inline unsigned int
>> +cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
>> +{
>> +	return (u64)(features << (64 - width - field)) >> (64 - width);
>> +}
>> +
>> +#define ID_AA64MMFR0_TGRAN4_SHIFT	28
>> +#define ID_AA64MMFR0_TGRAN64_SHIFT	24
>> +#define ID_AA64MMFR0_TGRAN16_SHIFT	20
>> +#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
>> +#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
>> +#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
>> +
>> +static inline bool system_supports_64kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT,4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
>> +}
>> +
>> +static inline bool system_supports_16kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN16_SHIFT, 4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
>> +}
>> +
>> +static inline bool system_supports_4kb_granule(void)
>> +{
>> +	u64 mmfr0;
>> +	u32 val;
>> +
>> +	mmfr0 = get_id_aa64mmfr0_el1();
>> +	val = cpuid_feature_extract_unsigned_field_width(
>> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT, 4);
>> +
>> +	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
>> +}
>> +
>> +#if PAGE_SIZE == 65536
>> +#define system_supports_configured_granule system_supports_64kb_granule
>> +#elif PAGE_SIZE == 16384
>> +#define system_supports_configured_granule system_supports_16kb_granule
>> +#elif PAGE_SIZE == 4096
>> +#define system_supports_configured_granule system_supports_4kb_granule
>> +#endif
>> +
>>  #endif /* !__ASSEMBLY__ */
>>  #endif /* _ASMARM64_PROCESSOR_H_ */
>> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
>> index 6d1c75b..51fa745 100644
>> --- a/lib/arm/mmu.c
>> +++ b/lib/arm/mmu.c
>> @@ -163,6 +163,9 @@ void *setup_mmu(phys_addr_t phys_end)
>>  
>>  #ifdef __aarch64__
>>  	init_alloc_vpage((void*)(4ul << 30));
>> +
>> +	assert_msg(system_supports_configured_granule(),
>> +		   "Unsupported translation granule %d\n", PAGE_SIZE);
>                                                      ^
>                                               needs '%ld' to compile
>>  #endif
>>  
>>  	mmu_idmap = alloc_page();
>> -- 
>> 2.17.1
>>
> I don't think we need the three separate functions. How about just
> doing the following diff?
>
> Thanks,
> drew
>
>
> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> index 540a1e842d5b..fef62f5a9866 100644
> --- a/lib/arm/mmu.c
> +++ b/lib/arm/mmu.c
> @@ -160,6 +160,9 @@ void *setup_mmu(phys_addr_t phys_end)
>  
>  #ifdef __aarch64__
>  	init_alloc_vpage((void*)(4ul << 30));
> +
> +	assert_msg(system_supports_granule(PAGE_SIZE),
> +		   "Unsupported translation granule: %ld\n", PAGE_SIZE);
>  #endif
>  
>  	mmu_idmap = alloc_page();
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 02665b84cc7e..dc493d1686bc 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -117,5 +117,21 @@ static inline u64 get_ctr(void)
>  
>  extern u32 dcache_line_size;
>  
> +static inline unsigned long get_id_aa64mmfr0_el1(void)
> +{
> +	unsigned long mmfr0;
> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
> +	return mmfr0;

I think we can safely use read_sysreg here, the other functions in this file do.

> +}
> +
> +static inline bool system_supports_granule(size_t granule)
> +{
> +	u64 mmfr0 = get_id_aa64mmfr0_el1();
> +
> +	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
> +		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
> +		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
> +}

Or we can turn it into a switch statement and keep all the field defines. Either
way looks good to me (funny how tgran16 stands out).

Thanks,
Alex
Andrew Jones Nov. 3, 2020, 5:36 p.m. UTC | #4
On Tue, Nov 03, 2020 at 05:03:15PM +0000, Alexandru Elisei wrote:
> Hi,
> 
> On 11/3/20 10:02 AM, Andrew Jones wrote:
> > On Mon, Nov 02, 2020 at 11:34:44AM +0000, Nikos Nikoleris wrote:
> >> Now that we can change the translation granule at will, and since
> >> arm64 implementations can support a subset of the architecturally
> >> defined granules, we need to check and warn the user if the configured
> >> granule is not supported.
> > nit: it'd be better for this patch to come before the last patch.
> >
> >> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
> >> ---
> >>  lib/arm64/asm/processor.h | 65 +++++++++++++++++++++++++++++++++++++++
> >>  lib/arm/mmu.c             |  3 ++
> >>  2 files changed, 68 insertions(+)
> >>
> >> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> >> index 02665b8..0eac928 100644
> >> --- a/lib/arm64/asm/processor.h
> >> +++ b/lib/arm64/asm/processor.h
> >> @@ -117,5 +117,70 @@ static inline u64 get_ctr(void)
> >>  
> >>  extern u32 dcache_line_size;
> >>  
> >> +static inline unsigned long get_id_aa64mmfr0_el1(void)
> >> +{
> >> +	unsigned long mmfr0;
> >> +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
> >> +	return mmfr0;
> >> +}
> >> +
> >> +/* From arch/arm64/include/asm/cpufeature.h */
> >> +static inline unsigned int
> >> +cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
> >> +{
> >> +	return (u64)(features << (64 - width - field)) >> (64 - width);
> >> +}
> >> +
> >> +#define ID_AA64MMFR0_TGRAN4_SHIFT	28
> >> +#define ID_AA64MMFR0_TGRAN64_SHIFT	24
> >> +#define ID_AA64MMFR0_TGRAN16_SHIFT	20
> >> +#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
> >> +#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
> >> +#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
> >> +
> >> +static inline bool system_supports_64kb_granule(void)
> >> +{
> >> +	u64 mmfr0;
> >> +	u32 val;
> >> +
> >> +	mmfr0 = get_id_aa64mmfr0_el1();
> >> +	val = cpuid_feature_extract_unsigned_field_width(
> >> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT,4);
> >> +
> >> +	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
> >> +}
> >> +
> >> +static inline bool system_supports_16kb_granule(void)
> >> +{
> >> +	u64 mmfr0;
> >> +	u32 val;
> >> +
> >> +	mmfr0 = get_id_aa64mmfr0_el1();
> >> +	val = cpuid_feature_extract_unsigned_field_width(
> >> +		mmfr0, ID_AA64MMFR0_TGRAN16_SHIFT, 4);
> >> +
> >> +	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
> >> +}
> >> +
> >> +static inline bool system_supports_4kb_granule(void)
> >> +{
> >> +	u64 mmfr0;
> >> +	u32 val;
> >> +
> >> +	mmfr0 = get_id_aa64mmfr0_el1();
> >> +	val = cpuid_feature_extract_unsigned_field_width(
> >> +		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT, 4);
> >> +
> >> +	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
> >> +}
> >> +
> >> +#if PAGE_SIZE == 65536
> >> +#define system_supports_configured_granule system_supports_64kb_granule
> >> +#elif PAGE_SIZE == 16384
> >> +#define system_supports_configured_granule system_supports_16kb_granule
> >> +#elif PAGE_SIZE == 4096
> >> +#define system_supports_configured_granule system_supports_4kb_granule
> >> +#endif
> >> +
> >>  #endif /* !__ASSEMBLY__ */
> >>  #endif /* _ASMARM64_PROCESSOR_H_ */
> >> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> >> index 6d1c75b..51fa745 100644
> >> --- a/lib/arm/mmu.c
> >> +++ b/lib/arm/mmu.c
> >> @@ -163,6 +163,9 @@ void *setup_mmu(phys_addr_t phys_end)
> >>  
> >>  #ifdef __aarch64__
> >>  	init_alloc_vpage((void*)(4ul << 30));
> >> +
> >> +	assert_msg(system_supports_configured_granule(),
> >> +		   "Unsupported translation granule %d\n", PAGE_SIZE);
> >                                                      ^
> >                                               needs '%ld' to compile
> >>  #endif
> >>  
> >>  	mmu_idmap = alloc_page();
> >> -- 
> >> 2.17.1
> >>
> > I don't think we need the three separate functions. How about just
> > doing the following diff?
> >
> > Thanks,
> > drew
> >
> >
> > diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> > index 540a1e842d5b..fef62f5a9866 100644
> > --- a/lib/arm/mmu.c
> > +++ b/lib/arm/mmu.c
> > @@ -160,6 +160,9 @@ void *setup_mmu(phys_addr_t phys_end)
> >  
> >  #ifdef __aarch64__
> >  	init_alloc_vpage((void*)(4ul << 30));
> > +
> > +	assert_msg(system_supports_granule(PAGE_SIZE),
> > +		   "Unsupported translation granule: %ld\n", PAGE_SIZE);
> >  #endif
> >  
> >  	mmu_idmap = alloc_page();
> > diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> > index 02665b84cc7e..dc493d1686bc 100644
> > --- a/lib/arm64/asm/processor.h
> > +++ b/lib/arm64/asm/processor.h
> > @@ -117,5 +117,21 @@ static inline u64 get_ctr(void)
> >  
> >  extern u32 dcache_line_size;
> >  
> > +static inline unsigned long get_id_aa64mmfr0_el1(void)
> > +{
> > +	unsigned long mmfr0;
> > +	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
> > +	return mmfr0;
> 
> I think we can safely use read_sysreg here, the other functions in this file do.

Agreed

> 
> > +}
> > +
> > +static inline bool system_supports_granule(size_t granule)
> > +{
> > +	u64 mmfr0 = get_id_aa64mmfr0_el1();
> > +
> > +	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
> > +		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
> > +		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
> > +}
> 
> Or we can turn it into a switch statement and keep all the field defines. Either
> way looks good to me (funny how tgran16 stands out).
>

Keeping the defines is probably a good idea. Whether the function uses
a switch or an expression like above doesn't matter to me much. Keeping
LOC down in the lib/ code is a goal of kvm-unit-tests, but so is
readabilty. If the switch looks better, then let's go that way.

Thanks,
drew
Nikos Nikoleris Nov. 3, 2020, 6:14 p.m. UTC | #5
On 03/11/2020 17:36, Andrew Jones wrote:
> On Tue, Nov 03, 2020 at 05:03:15PM +0000, Alexandru Elisei wrote:
>>> +}
>>> +
>>> +static inline bool system_supports_granule(size_t granule)
>>> +{
>>> +	u64 mmfr0 = get_id_aa64mmfr0_el1();
>>> +
>>> +	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
>>> +		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
>>> +		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
>>> +}
>>
>> Or we can turn it into a switch statement and keep all the field defines. Either
>> way looks good to me (funny how tgran16 stands out).
>>
> 
> Keeping the defines is probably a good idea. Whether the function uses
> a switch or an expression like above doesn't matter to me much. Keeping
> LOC down in the lib/ code is a goal of kvm-unit-tests, but so is
> readabilty. If the switch looks better, then let's go that way.
> 

I liked Drew's version in that it was very concise. The new version will 
be much longer. If you think it's more readable I'll use that instead.

diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
index 02665b8..430ded3 100644
--- a/lib/arm64/asm/processor.h
+++ b/lib/arm64/asm/processor.h
@@ -117,5 +117,38 @@ static inline u64 get_ctr(void)

  extern u32 dcache_line_size;

+static inline unsigned long get_id_aa64mmfr0_el1(void)
+{
+       return read_sysreg(id_aa64mmfr0_el1);
+}
+
+#define ID_AA64MMFR0_TGRAN4_SHIFT      28
+#define ID_AA64MMFR0_TGRAN64_SHIFT     24
+#define ID_AA64MMFR0_TGRAN16_SHIFT     20
+
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED  0x0
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
+
+static inline bool system_supports_granule(size_t granule)
+{
+       u32 shift;
+       u32 val;
+       u64 mmfr0 = get_id_aa64mmfr0_el1();
+       if (granule == SZ_4K) {
+               shift = ID_AA64MMFR0_TGRAN4_SHIFT;
+               val = ID_AA64MMFR0_TGRAN4_SUPPORTED;
+       } else if (granule == SZ_16K) {
+               shift = ID_AA64MMFR0_TGRAN16_SHIFT;
+               val = ID_AA64MMFR0_TGRAN16_SUPPORTED;
+       } else {
+               assert(granule == SZ_64K);
+               shift = ID_AA64MMFR0_TGRAN64_SHIFT;
+               val = ID_AA64MMFR0_TGRAN64_SUPPORTED;
+       }
+
+       return ((mmfr0 >> shift) & 0xf) == val;
+}
+
  #endif /* !__ASSEMBLY__ */
  #endif /* _ASMARM64_PROCESSOR_H_ */

Thanks,

Nikos

> Thanks,
> drew
>
Andrew Jones Nov. 3, 2020, 6:23 p.m. UTC | #6
On Tue, Nov 03, 2020 at 06:14:53PM +0000, Nikos Nikoleris wrote:
> On 03/11/2020 17:36, Andrew Jones wrote:
> > On Tue, Nov 03, 2020 at 05:03:15PM +0000, Alexandru Elisei wrote:
> > > > +}
> > > > +
> > > > +static inline bool system_supports_granule(size_t granule)
> > > > +{
> > > > +	u64 mmfr0 = get_id_aa64mmfr0_el1();
> > > > +
> > > > +	return ((granule == SZ_4K && ((mmfr0 >> 28) & 0xf) == 0) ||
> > > > +		(granule == SZ_64K && ((mmfr0 >> 24) & 0xf) == 0) ||
> > > > +		(granule == SZ_16K && ((mmfr0 >> 20) & 0xf) == 1));
> > > > +}
> > > 
> > > Or we can turn it into a switch statement and keep all the field defines. Either
> > > way looks good to me (funny how tgran16 stands out).
> > > 
> > 
> > Keeping the defines is probably a good idea. Whether the function uses
> > a switch or an expression like above doesn't matter to me much. Keeping
> > LOC down in the lib/ code is a goal of kvm-unit-tests, but so is
> > readabilty. If the switch looks better, then let's go that way.
> > 
> 
> I liked Drew's version in that it was very concise. The new version will be
> much longer. If you think it's more readable I'll use that instead.
> 
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 02665b8..430ded3 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -117,5 +117,38 @@ static inline u64 get_ctr(void)
> 
>  extern u32 dcache_line_size;
> 
> +static inline unsigned long get_id_aa64mmfr0_el1(void)
> +{
> +       return read_sysreg(id_aa64mmfr0_el1);
> +}
> +
> +#define ID_AA64MMFR0_TGRAN4_SHIFT      28
> +#define ID_AA64MMFR0_TGRAN64_SHIFT     24
> +#define ID_AA64MMFR0_TGRAN16_SHIFT     20
> +
> +#define ID_AA64MMFR0_TGRAN4_SUPPORTED  0x0
> +#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
> +#define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
> +
> +static inline bool system_supports_granule(size_t granule)
> +{
> +       u32 shift;
> +       u32 val;
> +       u64 mmfr0 = get_id_aa64mmfr0_el1();
> +       if (granule == SZ_4K) {
> +               shift = ID_AA64MMFR0_TGRAN4_SHIFT;
> +               val = ID_AA64MMFR0_TGRAN4_SUPPORTED;
> +       } else if (granule == SZ_16K) {
> +               shift = ID_AA64MMFR0_TGRAN16_SHIFT;
> +               val = ID_AA64MMFR0_TGRAN16_SUPPORTED;
> +       } else {
> +               assert(granule == SZ_64K);
> +               shift = ID_AA64MMFR0_TGRAN64_SHIFT;
> +               val = ID_AA64MMFR0_TGRAN64_SUPPORTED;
> +       }
> +
> +       return ((mmfr0 >> shift) & 0xf) == val;
> +}
> +
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM64_PROCESSOR_H_ */
>

I'm happy with it either way.

Thanks,
drew
diff mbox series

Patch

diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
index 02665b8..0eac928 100644
--- a/lib/arm64/asm/processor.h
+++ b/lib/arm64/asm/processor.h
@@ -117,5 +117,70 @@  static inline u64 get_ctr(void)
 
 extern u32 dcache_line_size;
 
+static inline unsigned long get_id_aa64mmfr0_el1(void)
+{
+	unsigned long mmfr0;
+	asm volatile("mrs %0, id_aa64mmfr0_el1" : "=r" (mmfr0));
+	return mmfr0;
+}
+
+/* From arch/arm64/include/asm/cpufeature.h */
+static inline unsigned int
+cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
+{
+	return (u64)(features << (64 - width - field)) >> (64 - width);
+}
+
+#define ID_AA64MMFR0_TGRAN4_SHIFT	28
+#define ID_AA64MMFR0_TGRAN64_SHIFT	24
+#define ID_AA64MMFR0_TGRAN16_SHIFT	20
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
+
+static inline bool system_supports_64kb_granule(void)
+{
+	u64 mmfr0;
+	u32 val;
+
+	mmfr0 = get_id_aa64mmfr0_el1();
+	val = cpuid_feature_extract_unsigned_field_width(
+		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT,4);
+
+	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
+}
+
+static inline bool system_supports_16kb_granule(void)
+{
+	u64 mmfr0;
+	u32 val;
+
+	mmfr0 = get_id_aa64mmfr0_el1();
+	val = cpuid_feature_extract_unsigned_field_width(
+		mmfr0, ID_AA64MMFR0_TGRAN16_SHIFT, 4);
+
+	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
+}
+
+static inline bool system_supports_4kb_granule(void)
+{
+	u64 mmfr0;
+	u32 val;
+
+	mmfr0 = get_id_aa64mmfr0_el1();
+	val = cpuid_feature_extract_unsigned_field_width(
+		mmfr0, ID_AA64MMFR0_TGRAN4_SHIFT, 4);
+
+	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
+}
+
+#if PAGE_SIZE == 65536
+#define system_supports_configured_granule system_supports_64kb_granule
+#elif PAGE_SIZE == 16384
+#define system_supports_configured_granule system_supports_16kb_granule
+#elif PAGE_SIZE == 4096
+#define system_supports_configured_granule system_supports_4kb_granule
+#endif
+
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASMARM64_PROCESSOR_H_ */
diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
index 6d1c75b..51fa745 100644
--- a/lib/arm/mmu.c
+++ b/lib/arm/mmu.c
@@ -163,6 +163,9 @@  void *setup_mmu(phys_addr_t phys_end)
 
 #ifdef __aarch64__
 	init_alloc_vpage((void*)(4ul << 30));
+
+	assert_msg(system_supports_configured_granule(),
+		   "Unsupported translation granule %d\n", PAGE_SIZE);
 #endif
 
 	mmu_idmap = alloc_page();