From patchwork Mon Nov 2 19:16:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11875075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8429BC00A89 for ; Mon, 2 Nov 2020 19:16:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 21684223C6 for ; Mon, 2 Nov 2020 19:16:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604344578; bh=/vSypgHV3ppGf3VM+3b9Uw3XIcZP+Wgme9h2xxf4rZk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BiR01uD8y9t+XX7KMpHg3JI4GP9flgJsBlh1QD5xZtGfw7ahc0Plu2t9zF64HSULN RLjZlr3bJMsyg8mNJhvINpHCncMCczfMog/aWR1N0CvCWSfx5bNyCSiQ1cOCGVVvp2 U4k4gWWVOHT37H9Ovy6XMaOKezp2mpB3glkW+Gbg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726236AbgKBTQR (ORCPT ); Mon, 2 Nov 2020 14:16:17 -0500 Received: from mail.kernel.org ([198.145.29.99]:60292 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725809AbgKBTQQ (ORCPT ); Mon, 2 Nov 2020 14:16:16 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D25C022268; Mon, 2 Nov 2020 19:16:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604344576; bh=/vSypgHV3ppGf3VM+3b9Uw3XIcZP+Wgme9h2xxf4rZk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jeit1NMHhX4xxwzPds+AWo/WCs7knZm/wlcZzqEKKmDomnYeQkAHx89yAyZOvJgOh A9QTftl8eyR8VgstIFAL7SFsnPGmQ0Z0R1Oz8Dpiy2/T1LWSuzSCX8JzumwiaUuAmr roc9B0thDHMJ0rj+myJXbYJKk1+F1RUBByRuP1lI= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1kZfJO-006nxn-2w; Mon, 02 Nov 2020 19:16:14 +0000 From: Marc Zyngier To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: James Morse , Julien Thierry , Suzuki K Poulose , kernel-team@android.com Subject: [PATCH 2/8] KVM: arm64: Add AArch32 mapping annotation Date: Mon, 2 Nov 2020 19:16:03 +0000 Message-Id: <20201102191609.265711-3-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201102191609.265711-1-maz@kernel.org> References: <20201102191609.265711-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org In order to deal with the few AArch32 system registers that map to only a particular half of their AArch64 counterpart (such as DFAR and IFAR being colocated in FAR_EL1), let's add an optional annotation to the sysreg descriptor structure, indicating whether a register maps to the upper or lower 32bits of a register. Nothing is using these annotation yet. Signed-off-by: Marc Zyngier --- arch/arm64/kvm/sys_regs.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h index 5a6fc30f5989..259864c3c76b 100644 --- a/arch/arm64/kvm/sys_regs.h +++ b/arch/arm64/kvm/sys_regs.h @@ -27,6 +27,12 @@ struct sys_reg_desc { /* Sysreg string for debug */ const char *name; + enum { + AA32_ZEROHIGH, + AA32_LO, + AA32_HI, + } aarch32_map; + /* MRS/MSR instruction which accesses it. */ u8 Op0; u8 Op1; @@ -153,6 +159,7 @@ const struct sys_reg_desc *find_reg_by_id(u64 id, const struct sys_reg_desc table[], unsigned int num); +#define AA32(_x) .aarch32_map = AA32_##_x #define Op0(_x) .Op0 = _x #define Op1(_x) .Op1 = _x #define CRn(_x) .CRn = _x