| Message ID | 20201202184415.1434484-8-f4bug@amsat.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/mips: Simplify MSA TCG logic | expand |
On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote: > Extract the logic initialization of the MSA registers from > the generic initialization. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/translate.c | 35 ++++++++++++++++++++--------------- > 1 file changed, 20 insertions(+), 15 deletions(-) Why? > - fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); > + fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); Maybe fold this back to the previous patch? r~
On 12/4/20 5:30 PM, Richard Henderson wrote: > On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote: >> Extract the logic initialization of the MSA registers from >> the generic initialization. >> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >> --- >> target/mips/translate.c | 35 ++++++++++++++++++++--------------- >> 1 file changed, 20 insertions(+), 15 deletions(-) > > Why? msa_wr_d[] registers are only used by MSA, so in the next series that allows me to move the 'static msa_wr_d[]' in msa_translate.c, without having to declare them global with extern. > >> - fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); >> + fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); > > Maybe fold this back to the previous patch? Certainly ;) > > > r~ >
On 12/4/20 11:23 AM, Philippe Mathieu-Daudé wrote: > On 12/4/20 5:30 PM, Richard Henderson wrote: >> On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote: >>> Extract the logic initialization of the MSA registers from >>> the generic initialization. >>> >>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >>> --- >>> target/mips/translate.c | 35 ++++++++++++++++++++--------------- >>> 1 file changed, 20 insertions(+), 15 deletions(-) >> >> Why? > > msa_wr_d[] registers are only used by MSA, so in the next series > that allows me to move the 'static msa_wr_d[]' in msa_translate.c, > without having to declare them global with extern. Ah, sure. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/translate.c b/target/mips/translate.c index 41880f21abd..a5112acc351 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31672,6 +31672,24 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags) } } +static void msa_translate_init(void) +{ + int i; + + for (i = 0; i < 32; i++) { + int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); + + /* + * The MSA vector registers are mapped on the + * scalar floating-point unit (FPU) registers. + */ + msa_wr_d[i * 2] = fpu_f64[i]; + off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); + msa_wr_d[i * 2 + 1] = + tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]); + } +} + void mips_tcg_init(void) { int i; @@ -31685,22 +31703,9 @@ void mips_tcg_init(void) for (i = 0; i < 32; i++) { int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); - fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); + fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); } - /* MSA */ - for (i = 0; i < 32; i++) { - int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); - - /* - * The MSA vector registers are mapped on the - * scalar floating-point unit (FPU) registers. - */ - msa_wr_d[i * 2] = fpu_f64[i]; - off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); - msa_wr_d[i * 2 + 1] = - tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]); - } - + msa_translate_init(); cpu_PC = tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.PC), "PC"); for (i = 0; i < MIPS_DSP_ACC; i++) {
Extract the logic initialization of the MSA registers from the generic initialization. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/translate.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-)