| Message ID | 20201217120057.88562-2-alexandru.elisei@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Don't access PMU when not present | expand |
On Thu, Dec 17, 2020 at 12:00:57PM +0000, Alexandru Elisei wrote: > For arm and arm64, the PMU is an optional part of the architecture. > According to ARM DDI 0487F.b, page D13-3683, accessing PMCR_EL0 when the > PMU is not present generates an undefined exception (one would assume that > this is also true for arm). > > The pmu_probe() function reads the register before checking that a PMU is > present, so defer accessing PMCR_EL0 until after we know that it is safe. > > This hasn't been a problem so far because there's no hardware in the wild > without a PMU and KVM, contrary to the architecture, has treated the PMU > registers as RAZ/WI if the VCPU doesn't have the PMU feature. However, > that's about to change as KVM will start treating the registers as > undefined when the guest doesn't have a PMU. > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> > --- > arm/pmu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arm/pmu.c b/arm/pmu.c > index cc959e6a5c76..15c542a230ea 100644 > --- a/arm/pmu.c > +++ b/arm/pmu.c > @@ -988,7 +988,7 @@ static void pmccntr64_test(void) > /* Return FALSE if no PMU found, otherwise return TRUE */ > static bool pmu_probe(void) > { > - uint32_t pmcr = get_pmcr(); > + uint32_t pmcr; > uint8_t implementer; > > pmu.version = get_pmu_version(); > @@ -997,6 +997,7 @@ static bool pmu_probe(void) > > report_info("PMU version: 0x%x", pmu.version); > > + pmcr = get_pmcr(); > implementer = (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK; > report_info("PMU implementer/ID code: %#"PRIx32"(\"%c\")/%#"PRIx32, > (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK, > -- > 2.29.2 > Queued, https://gitlab.com/rhdrjones/kvm-unit-tests/commits/arm/queue Thanks, drew
diff --git a/arm/pmu.c b/arm/pmu.c index cc959e6a5c76..15c542a230ea 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -988,7 +988,7 @@ static void pmccntr64_test(void) /* Return FALSE if no PMU found, otherwise return TRUE */ static bool pmu_probe(void) { - uint32_t pmcr = get_pmcr(); + uint32_t pmcr; uint8_t implementer; pmu.version = get_pmu_version(); @@ -997,6 +997,7 @@ static bool pmu_probe(void) report_info("PMU version: 0x%x", pmu.version); + pmcr = get_pmcr(); implementer = (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK; report_info("PMU implementer/ID code: %#"PRIx32"(\"%c\")/%#"PRIx32, (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK,
For arm and arm64, the PMU is an optional part of the architecture. According to ARM DDI 0487F.b, page D13-3683, accessing PMCR_EL0 when the PMU is not present generates an undefined exception (one would assume that this is also true for arm). The pmu_probe() function reads the register before checking that a PMU is present, so defer accessing PMCR_EL0 until after we know that it is safe. This hasn't been a problem so far because there's no hardware in the wild without a PMU and KVM, contrary to the architecture, has treated the PMU registers as RAZ/WI if the VCPU doesn't have the PMU feature. However, that's about to change as KVM will start treating the registers as undefined when the guest doesn't have a PMU. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arm/pmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)