@@ -50,19 +50,12 @@ struct uv_cb_share {
u64 reserved28;
} __attribute__((packed)) __attribute__((aligned(8)));
-static inline int uv_call(unsigned long r1, unsigned long r2)
+static inline int uv_call_once(unsigned long r1, unsigned long r2)
{
int cc;
- /*
- * The brc instruction will take care of the cc 2/3 case where
- * we need to continue the execution because we were
- * interrupted. The inline assembly will only return on
- * success/error i.e. cc 0/1.
- */
asm volatile(
"0: .insn rrf,0xB9A40000,%[r1],%[r2],0,0\n"
- " brc 3,0b\n"
" ipm %[cc]\n"
" srl %[cc],28\n"
: [cc] "=d" (cc)
@@ -71,4 +64,19 @@ static inline int uv_call(unsigned long r1, unsigned long r2)
return cc;
}
+static inline int uv_call(unsigned long r1, unsigned long r2)
+{
+ int cc;
+
+ /*
+ * CC 2 and 3 tell us to re-execute because the instruction
+ * hasn't yet finished.
+ */
+ do {
+ cc = uv_call_once(r1, r2);
+ } while (cc > 1);
+
+ return cc;
+}
+
#endif
@@ -29,7 +29,7 @@ static void test_priv(void)
uvcb.len = sizeof(struct uv_cb_qui);
expect_pgm_int();
enter_pstate();
- uv_call(0, (u64)&uvcb);
+ uv_call_once(0, (u64)&uvcb);
check_pgm_int_code(PGM_INT_CODE_PRIVILEGED_OPERATION);
report_prefix_pop();
@@ -38,7 +38,7 @@ static void test_priv(void)
uvcb.len = sizeof(struct uv_cb_share);
expect_pgm_int();
enter_pstate();
- uv_call(0, (u64)&uvcb);
+ uv_call_once(0, (u64)&uvcb);
check_pgm_int_code(PGM_INT_CODE_PRIVILEGED_OPERATION);
report_prefix_pop();
@@ -47,7 +47,7 @@ static void test_priv(void)
uvcb.len = sizeof(struct uv_cb_share);
expect_pgm_int();
enter_pstate();
- uv_call(0, (u64)&uvcb);
+ uv_call_once(0, (u64)&uvcb);
check_pgm_int_code(PGM_INT_CODE_PRIVILEGED_OPERATION);
report_prefix_pop();