From patchwork Thu Feb 4 05:32:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 12066321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37BC1C433E9 for ; Thu, 4 Feb 2021 05:35:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E5E3664F55 for ; Thu, 4 Feb 2021 05:35:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231862AbhBDFfL (ORCPT ); Thu, 4 Feb 2021 00:35:11 -0500 Received: from esa5.hgst.iphmx.com ([216.71.153.144]:38918 "EHLO esa5.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231910AbhBDFfG (ORCPT ); Thu, 4 Feb 2021 00:35:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612416905; x=1643952905; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zkz7usoeD7H22CZL96Ux56lGImBj0Y0tKyEFaWX6wQE=; b=MlDTis74QSYxE6KDJZntJiGN44er/N0dqjZwQorxMv4IS2r4KVoHAS8+ RZJ6qxGTO8RJHXZPFxXGhe/PSOG5hW6oBzdWXNao6Uoq1EFsWX26B5btl Awpgl96kKTF/9YhGkwzon00RK+b3yY15SUl6KgZv15mkisYR/VP1QXIkk t7I6RHThuj9i+aju0xgAt2zNuvnc6dcdkUjxn1u8Hw7SXGJZ0su4pKcl9 szZqj7lR9l1Eh+Icvoc8KAlAcT4TUg5mnC5ZOG0RSNzXhW+3v6tWEbUhX 2ODNOt4/RcL/IJikaIeXppxQ9h8BGgEI1RGEFeV4YGS9NmEBogTZHzKpi g==; IronPort-SDR: 5I+XYCo47HOs1VQ59oabpIpD0wmIY5JACiUu2cd6AkUxGjAH9gsXtpD+wsAVLJdOMQCyb+NogW aRAWtcPpsInRUcfdwVsqu3fkbEQCzeZD9Ql9wdzojLSJj9OX1Y3PIH6OAamGSxiu/8sFjLxwiG XUSJbJtVoSwVdddUIb0Z54atpafmLy63BQ+EjkTvNUbOSvOrHr+a9kgDMp93D/G/iTOuF5TEDv VKOYVK/FDubcv9iszboTCWDXqNSniScvQKxsUSyfWPv/VuYonbYIFsoPdVr7xUcKPE4WWSwUXe UI0= X-IronPort-AV: E=Sophos;i="5.79,400,1602518400"; d="scan'208";a="159086446" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 04 Feb 2021 13:32:54 +0800 IronPort-SDR: y/AZzVlfMO7OO2HxqJpogOm2jFHLF/HuzCCb9uCARAVTGQc6jkg+rz/wqQ/se3PiUqHR1/owZn rfOFRj1YbgCjun0uqkX10gVJ3l+0ItbcQzsAhsRmV8HT+5ZmcXNz6QES2qtI5hFqYoMjrYqXTB ZSO/ynnDVXgU0Mv1oDg9ReJQVOQfyoZ6kDdO8zOP5lKeMRkjMf+pj0vXSRbkFZaGV8eoBkiRsr ohYoNXOiFxTC9jWCf3FgoJVPtpXgNSPaQYbFslB/SusopwOxkvAONl1OdW6hv2vOs07bcO1KmF jEhyye6/0UX9AONKW9tIVufM Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 21:16:54 -0800 IronPort-SDR: Oymd+BRq45I98/7mHFwaiDoPJ21T5pwZQXWJE5sq0waNsatNrFzyeyC2kQF3HolfPtZsN3amJf Qtvd/K/x4MYehN016BMKakZ3O2smkSv0KiZ5CuQw8deXQG1E2mk5oalyodKFk9KMklxAdWr+XM WIsgHqocevKHM9jEd2HSdZEjxc4d6QfIy60/+AW0BYbzmJy9yqZxRHX6+OSFrugi/Aajz4QN9i RLIxZjH4W6b7H0PKBG8vTIky/YGOCUTQweNFkBkj7a5c+naFedLTUmxPcIItIB81h7lVSPbn4Y 1nc= WDCIronportException: Internal Received: from cnf008142.ad.shared (HELO jedi-01.hgst.com) ([10.86.63.165]) by uls-op-cesaip02.wdc.com with ESMTP; 03 Feb 2021 21:32:55 -0800 From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Albert Ou , Anup Patel , Kefeng Wang , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Palmer Dabbelt , Paul Walmsley Subject: [PATCH v2 4/6] RISC-V: Add v0.1 replacement SBI extensions defined in v02 Date: Wed, 3 Feb 2021 21:32:37 -0800 Message-Id: <20210204053239.1609558-5-atish.patra@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210204053239.1609558-1-atish.patra@wdc.com> References: <20210204053239.1609558-1-atish.patra@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The SBI v0.2 contains some of the improved versions of required v0.1 extensions such as remote fence, timer and IPI. This patch implements those extensions. Signed-off-by: Atish Patra --- arch/riscv/kvm/Makefile | 2 +- arch/riscv/kvm/vcpu_sbi.c | 6 ++ arch/riscv/kvm/vcpu_sbi_replace.c | 136 ++++++++++++++++++++++++++++++ 3 files changed, 143 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/kvm/vcpu_sbi_replace.c diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile index 0f17dffe8d46..302501295397 100644 --- a/arch/riscv/kvm/Makefile +++ b/arch/riscv/kvm/Makefile @@ -11,5 +11,5 @@ kvm-objs := $(common-objs-y) kvm-objs += main.o vm.o vmid.o tlb.o mmu.o kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o -kvm-objs += vcpu_sbi.o vcpu_sbi_base.o vcpu_sbi_legacy.o +kvm-objs += vcpu_sbi.o vcpu_sbi_base.o vcpu_sbi_legacy.o vcpu_sbi_replace.o obj-$(CONFIG_KVM) += kvm.o diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index c85c3b1dd2eb..e21ce1e69e03 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -32,10 +32,16 @@ static int kvm_linux_err_map_sbi(int err) extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_legacy; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_time; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence; static const struct kvm_vcpu_sbi_extension *sbi_ext[] = { &vcpu_sbi_ext_legacy, &vcpu_sbi_ext_base, + &vcpu_sbi_ext_time, + &vcpu_sbi_ext_ipi, + &vcpu_sbi_ext_rfence, }; void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c new file mode 100644 index 000000000000..dffb1930cada --- /dev/null +++ b/arch/riscv/kvm/vcpu_sbi_replace.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Atish Patra + */ + +#include +#include +#include +#include +#include +#include +#include + +static int kvm_sbi_ext_time_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + unsigned long *out_val, + struct kvm_cpu_trap *utrap, bool *exit) +{ + int ret = 0; + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + u64 next_cycle; + + if (!cp || (cp->a6 != SBI_EXT_TIME_SET_TIMER)) + return -EINVAL; + +#if __riscv_xlen == 32 + next_cycle = ((u64)cp->a1 << 32) | (u64)cp->a0; +#else + next_cycle = (u64)cp->a0; +#endif + kvm_riscv_vcpu_timer_next_event(vcpu, next_cycle); + + return ret; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_time = { + .extid_start = SBI_EXT_TIME, + .extid_end = SBI_EXT_TIME, + .handler = kvm_sbi_ext_time_handler, +}; + +static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + unsigned long *out_val, + struct kvm_cpu_trap *utrap, bool *exit) +{ + int i, ret = 0; + struct kvm_vcpu *tmp; + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + unsigned long hmask = cp->a0; + unsigned long hbase = cp->a1; + + if (!cp || (cp->a6 != SBI_EXT_IPI_SEND_IPI)) + return -EINVAL; + + kvm_for_each_vcpu(i, tmp, vcpu->kvm) { + if (hbase != -1UL) { + if (tmp->vcpu_id < hbase) + continue; + if (!(hmask & (1UL << (tmp->vcpu_id - hbase)))) + continue; + } + ret = kvm_riscv_vcpu_set_interrupt(tmp, IRQ_VS_SOFT); + if (ret < 0) + break; + } + + return ret; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi = { + .extid_start = SBI_EXT_IPI, + .extid_end = SBI_EXT_IPI, + .handler = kvm_sbi_ext_ipi_handler, +}; + +static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + unsigned long *out_val, + struct kvm_cpu_trap *utrap, bool *exit) +{ + int i, ret = 0; + struct cpumask cm, hm; + struct kvm_vcpu *tmp; + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + unsigned long hmask = cp->a0; + unsigned long hbase = cp->a1; + unsigned long funcid = cp->a6; + + if (!cp) + return -EINVAL; + + cpumask_clear(&cm); + cpumask_clear(&hm); + kvm_for_each_vcpu(i, tmp, vcpu->kvm) { + if (hbase != -1UL) { + if (tmp->vcpu_id < hbase) + continue; + if (!(hmask & (1UL << (tmp->vcpu_id - hbase)))) + continue; + } + if (tmp->cpu < 0) + continue; + cpumask_set_cpu(tmp->cpu, &cm); + } + + riscv_cpuid_to_hartid_mask(&cm, &hm); + + switch (funcid) { + case SBI_EXT_RFENCE_REMOTE_FENCE_I: + ret = sbi_remote_fence_i(cpumask_bits(&hm)); + break; + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: + ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), cp->a2, cp->a3); + break; + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: + ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), cp->a2, + cp->a3, cp->a4); + break; + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID: + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA: + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID: + /* TODO: implement for nested hypervisor case */ + default: + ret = -EOPNOTSUPP; + } + + return ret; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence = { + .extid_start = SBI_EXT_RFENCE, + .extid_end = SBI_EXT_RFENCE, + .handler = kvm_sbi_ext_rfence_handler, +};