@@ -28,35 +28,6 @@
lpswe \old_psw
.endm
- .macro SAVE_REGS
- /* save grs 0-15 */
- stmg %r0, %r15, GEN_LC_SW_INT_GRS
- /* save crs 0-15 */
- stctg %c0, %c15, GEN_LC_SW_INT_CRS
- /* load a cr0 that has the AFP control bit which enables all FPRs */
- larl %r1, initial_cr0
- lctlg %c0, %c0, 0(%r1)
- /* save fprs 0-15 + fpc */
- la %r1, GEN_LC_SW_INT_FPRS
- .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- std \i, \i * 8(%r1)
- .endr
- stfpc GEN_LC_SW_INT_FPC
- .endm
-
- .macro RESTORE_REGS
- /* restore fprs 0-15 + fpc */
- la %r1, GEN_LC_SW_INT_FPRS
- .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- ld \i, \i * 8(%r1)
- .endr
- lfpc GEN_LC_SW_INT_FPC
- /* restore crs 0-15 */
- lctlg %c0, %c15, GEN_LC_SW_INT_CRS
- /* restore grs 0-15 */
- lmg %r0, %r15, GEN_LC_SW_INT_GRS
- .endm
-
/* Save registers on the stack (r15), so we can have stacked interrupts. */
.macro SAVE_REGS_STACK
/* Allocate a full stack frame */