diff mbox series

[22/23] x86/cpufeatures: Add the Virtual SPEC_CTRL feature

Message ID	20210302193343.313318-23-pbonzini@redhat.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@kernel.org> From: Paolo Bonzini <pbonzini@redhat.com> To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: seanjc@google.com, Babu Moger <babu.moger@amd.com>, Borislav Petkov <bp@suse.de> Subject: [PATCH 22/23] x86/cpufeatures: Add the Virtual SPEC_CTRL feature Date: Tue, 2 Mar 2021 14:33:42 -0500 Message-Id: <20210302193343.313318-23-pbonzini@redhat.com> In-Reply-To: <20210302193343.313318-1-pbonzini@redhat.com> References: <20210302193343.313318-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	SVM queue for 5.13 \| expand [00/23] SVM queue for 5.13 [01/23] KVM: SVM: Use a separate vmcb for the nested L2 guest [02/23] KVM: nSVM: Track the physical cpu of the vmcb vmrun through the vmcb [03/23] KVM: nSVM: Track the ASID generation of the vmcb vmrun through the vmcb [04/23] KVM: nSVM: rename functions and variables according to vmcbXY nomenclature [05/23] KVM: nSVM: do not copy vmcb01->control blindly to vmcb02->control [06/23] KVM: nSVM: do not mark all VMCB01 fields dirty on nested vmexit [07/23] KVM: nSVM: do not mark all VMCB02 fields dirty on nested vmexit [08/23] KVM: nSVM: only copy L1 non-VMLOAD/VMSAVE data in svm_set_nested_state() [09/23] KVM: nSVM: Add missing checks for reserved bits to svm_set_nested_state() [10/23] KVM: x86: Move nVMX's consistency check macro to common code [11/23] KVM: nSVM: Trace VM-Enter consistency check failures [12/23] KVM: SVM: merge update_cr0_intercept into svm_set_cr0 [13/23] KVM: SVM: Pass struct kvm_vcpu to exit handlers (and many, many other places) [14/23] KVM: nSVM: Add VMLOAD/VMSAVE helper to deduplicate code [15/23] KVM: x86: Move XSETBV emulation to common code [16/23] KVM: x86: Move trivial instruction-based exit handlers to common code [17/23] KVM: x86: Move RDPMC emulation to common code [18/23] KVM: SVM: Don't manually emulate RDPMC if nrips=0 [19/23] KVM: SVM: Skip intercepted PAUSE instructions after emulation [20/23] KVM: SVM: move VMLOAD/VMSAVE to C code [21/23] KVM: nSVM: always use vmcb01 to for vmsave/vmload of guest state [22/23] x86/cpufeatures: Add the Virtual SPEC_CTRL feature [23/23] KVM: SVM: Add support for Virtual SPEC_CTRL

Commit Message

Paolo Bonzini March 2, 2021, 7:33 p.m. UTC

From: Babu Moger <babu.moger@amd.com>

Newer AMD processors have a feature to virtualize the use of the
SPEC_CTRL MSR. Presence of this feature is indicated via CPUID
function 0x8000000A_EDX[20]: GuestSpecCtrl. When present, the
SPEC_CTRL MSR is automatically virtualized.

Signed-off-by: Babu Moger <babu.moger@amd.com>
Acked-by: Borislav Petkov <bp@suse.de>
Message-Id: <161188100272.28787.4097272856384825024.stgit@bmoger-ubuntu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff mbox series

Patch

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f1957b3c8e4e..9ac7ad4d8239 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -338,6 +338,7 @@ 
 #define X86_FEATURE_AVIC		(15*32+13) /* Virtual Interrupt Controller */
 #define X86_FEATURE_V_VMSAVE_VMLOAD	(15*32+15) /* Virtual VMSAVE VMLOAD */
 #define X86_FEATURE_VGIF		(15*32+16) /* Virtual GIF */
+#define X86_FEATURE_V_SPEC_CTRL		(15*32+20) /* Virtual SPEC_CTRL */
 #define X86_FEATURE_SVME_ADDR_CHK	(15*32+28) /* "" SVME addr check */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */