[kvm-unit-tests,13/14] x86: msr: Test that always-canonical MSRs #GP on non-canonical value

Commit Message

Sean Christopherson April 22, 2021, 3:05 a.m. UTC

Verify that WRMSR takes a #GP when writing a non-canonical value to a
MSR that always takes a 64-bit address.  Specifically, AMD doesn't
enforce a canonical address for the SYSENTER MSRs.

Signed-off-by: Sean Christopherson <[e-mail]>
---
 lib/x86/processor.h | 2 ++
 x86/msr.c           | 8 ++++++++
 x86/vmx_tests.c     | 2 --
 3 files changed, 10 insertions(+), 2 deletions(-)

Patch

diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index dfe96d0..abc04b0 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -6,6 +6,8 @@ 
 #include "msr.h"
 #include <stdint.h>
 
+#define NONCANONICAL            0xaaaaaaaaaaaaaaaaull
+
 #ifdef __x86_64__
 #  define R "r"
 #  define W "q"
diff --git a/x86/msr.c b/x86/msr.c
index e7ebe8b..8a1b0b2 100644
--- a/x86/msr.c
+++ b/x86/msr.c
@@ -80,6 +80,14 @@  int main(int ac, char **av)
 	for (i = 0 ; i < ARRAY_SIZE(msr_info); i++) {
 		if (is_64bit_host || !msr_info[i].is_64bit_only) {
 			test_msr_rw(&msr_info[i], msr_info[i].value);
+
+			/*
+			 * The 64-bit only MSRs that take an address always perform
+			 * canonical checks on both Intel and AMD.
+			 */
+			if (msr_info[i].is_64bit_only &&
+			    msr_info[i].value == addr_64)
+				test_wrmsr_fault(&msr_info[i], NONCANONICAL);
 		} else {
 			test_wrmsr_fault(&msr_info[i], msr_info[i].value);
 			test_rdmsr_fault(&msr_info[i]);
diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index bbb006a..2eb5962 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -21,8 +21,6 @@ 
 #include "smp.h"
 #include "delay.h"
 
-#define NONCANONICAL            0xaaaaaaaaaaaaaaaaull
-
 #define VPID_CAP_INVVPID_TYPES_SHIFT 40
 
 u64 ia32_pat;