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[12/43] KVM: x86: Remove defunct BSP "update" in local APIC reset

Message ID 20210424004645.3950558-13-seanjc@google.com (mailing list archive)
State New, archived
Headers show
Series KVM: x86: vCPU RESET/INIT fixes and consolidation | expand

Commit Message

Sean Christopherson April 24, 2021, 12:46 a.m. UTC
Remove a BSP APIC update in kvm_lapic_reset() that is a glorified and
confusing nop.  When the code was originally added, kvm_vcpu_is_bsp()
queried kvm->arch.bsp_vcpu, i.e. the intent was to set the BSP bit in the
BSP vCPU's APIC.  But, stuffing the BSP bit at INIT was wrong since the
guest can change its BSP(s); this was fixed by commit 58d269d8cccc ("KVM:
x86: BSP in MSR_IA32_APICBASE is writable").

In other words, kvm_vcpu_is_bsp() is now purely a reflection of
vcpu->arch.apic_base.MSR_IA32_APICBASE_BSP, thus the update will always
set the current value and kvm_lapic_set_base() is effectively a nop if
the new and old values match.  The RESET case, which does need to stuff
the BSP for the reset vCPU, is handled by vendor code (though this will
soon be moved to common code).

No functional change intended.

Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/lapic.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Reiji Watanabe May 26, 2021, 6:54 a.m. UTC | #1
On Fri, Apr 23, 2021 at 5:49 PM Sean Christopherson <seanjc@google.com> wrote:
>
> Remove a BSP APIC update in kvm_lapic_reset() that is a glorified and
> confusing nop.  When the code was originally added, kvm_vcpu_is_bsp()
> queried kvm->arch.bsp_vcpu, i.e. the intent was to set the BSP bit in the
> BSP vCPU's APIC.  But, stuffing the BSP bit at INIT was wrong since the
> guest can change its BSP(s); this was fixed by commit 58d269d8cccc ("KVM:
> x86: BSP in MSR_IA32_APICBASE is writable").
>
> In other words, kvm_vcpu_is_bsp() is now purely a reflection of
> vcpu->arch.apic_base.MSR_IA32_APICBASE_BSP, thus the update will always
> set the current value and kvm_lapic_set_base() is effectively a nop if
> the new and old values match.  The RESET case, which does need to stuff
> the BSP for the reset vCPU, is handled by vendor code (though this will
> soon be moved to common code).
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson <seanjc@google.com>

Reviewed-by: Reiji Watanabe <reijiw@google.com>
diff mbox series

Patch

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 655eb1d07344..b99630c6d7fe 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2351,9 +2351,7 @@  void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
 	apic->highest_isr_cache = -1;
 	update_divide_count(apic);
 	atomic_set(&apic->lapic_timer.pending, 0);
-	if (kvm_vcpu_is_bsp(vcpu))
-		kvm_lapic_set_base(vcpu,
-				vcpu->arch.apic_base | MSR_IA32_APICBASE_BSP);
+
 	vcpu->arch.pv_eoi.msr_val = 0;
 	apic_update_ppr(apic);
 	if (vcpu->arch.apicv_active) {