diff mbox series

KVM: x86/pt: Do not inject TraceToPAPMI when guest PT isn't supported

Message ID 20210514084436.848396-1-like.xu@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series KVM: x86/pt: Do not inject TraceToPAPMI when guest PT isn't supported | expand

Commit Message

Like Xu May 14, 2021, 8:44 a.m. UTC
When a PT perf user is running in system-wide mode on the host,
the guest (w/ pt_mode=0) will warn about anonymous NMIs from
kvm_handle_intel_pt_intr():

[   18.126444] Uhhuh. NMI received for unknown reason 10 on CPU 0.
[   18.126447] Do you have a strange power saving mode enabled?
[   18.126448] Dazed and confused, but trying to continue

In this case, these PMIs should be handled by the host PT handler().
When PT is used in guest-only mode, it's harmless to call host handler.

Fix: 8479e04e7d("KVM: x86: Inject PMI for KVM guest")
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
 arch/x86/events/intel/core.c | 3 +--
 arch/x86/kvm/x86.c           | 3 +++
 2 files changed, 4 insertions(+), 2 deletions(-)

Comments

Sean Christopherson May 26, 2021, 5:38 p.m. UTC | #1
On Fri, May 14, 2021, Like Xu wrote:
> When a PT perf user is running in system-wide mode on the host,
> the guest (w/ pt_mode=0) will warn about anonymous NMIs from
> kvm_handle_intel_pt_intr():
> 
> [   18.126444] Uhhuh. NMI received for unknown reason 10 on CPU 0.
> [   18.126447] Do you have a strange power saving mode enabled?
> [   18.126448] Dazed and confused, but trying to continue
> 
> In this case, these PMIs should be handled by the host PT handler().
> When PT is used in guest-only mode, it's harmless to call host handler.
> 
> Fix: 8479e04e7d("KVM: x86: Inject PMI for KVM guest")

s/Fix/Fixes

> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> ---
>  arch/x86/events/intel/core.c | 3 +--
>  arch/x86/kvm/x86.c           | 3 +++
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 2521d03de5e0..2f09eb0853de 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2853,8 +2853,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
>  		if (unlikely(perf_guest_cbs && perf_guest_cbs->is_in_guest() &&
>  			perf_guest_cbs->handle_intel_pt_intr))
>  			perf_guest_cbs->handle_intel_pt_intr();
> -		else
> -			intel_pt_interrupt();
> +		intel_pt_interrupt();

Would it make sense to instead do something like:

	bool host_pmi = true;

	...

		if (unlikely(perf_guest_cbs && perf_guest_cbs->is_in_guest() &&
			     perf_guest_cbs->handle_intel_pt_intr)
			host_pmi = !perf_guest_cbs->handle_intel_pt_intr();

		if (likely(host_pmi))
			intel_pt_interrupt();
>  	}
>  
>  	/*
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 6529e2023147..6660f3948cea 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -8087,6 +8087,9 @@ static void kvm_handle_intel_pt_intr(void)
>  {
>  	struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
>  
> +	if (!guest_cpuid_has(vcpu, X86_FEATURE_INTEL_PT))
> +		return;
> +
>  	kvm_make_request(KVM_REQ_PMI, vcpu);
>  	__set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
>  			(unsigned long *)&vcpu->arch.pmu.global_status);
> -- 
> 2.31.1
>
diff mbox series

Patch

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 2521d03de5e0..2f09eb0853de 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2853,8 +2853,7 @@  static int handle_pmi_common(struct pt_regs *regs, u64 status)
 		if (unlikely(perf_guest_cbs && perf_guest_cbs->is_in_guest() &&
 			perf_guest_cbs->handle_intel_pt_intr))
 			perf_guest_cbs->handle_intel_pt_intr();
-		else
-			intel_pt_interrupt();
+		intel_pt_interrupt();
 	}
 
 	/*
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 6529e2023147..6660f3948cea 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -8087,6 +8087,9 @@  static void kvm_handle_intel_pt_intr(void)
 {
 	struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
 
+	if (!guest_cpuid_has(vcpu, X86_FEATURE_INTEL_PT))
+		return;
+
 	kvm_make_request(KVM_REQ_PMI, vcpu);
 	__set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
 			(unsigned long *)&vcpu->arch.pmu.global_status);