diff mbox series

[V7,03/18] perf/x86/intel: Handle guest PEBS overflow PMI for KVM guest

Message ID 20210622094306.8336-4-lingshan.zhu@intel.com (mailing list archive)
State New, archived
Headers show
Series KVM: x86/pmu: Add *basic* support to enable guest PEBS via DS | expand

Commit Message

Zhu, Lingshan June 22, 2021, 9:42 a.m. UTC 
From: Like Xu <like.xu@linux.intel.com>

With PEBS virtualization, the guest PEBS records get delivered to the
guest DS, and the host pmi handler uses perf_guest_cbs->is_in_guest()
to distinguish whether the PMI comes from the guest code like Intel PT.

No matter how many guest PEBS counters are overflowed, only triggering
one fake event is enough. The fake event causes the KVM PMI callback to
be called, thereby injecting the PEBS overflow PMI into the guest.

KVM may inject the PMI with BUFFER_OVF set, even if the guest DS is
empty. That should really be harmless. Thus guest PEBS handler would
retrieve the correct information from its own PEBS records buffer.

Originally-by: Andi Kleen <ak@linux.intel.com>
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Zhu Lingshan <lingshan.zhu@intel.com>
---
 arch/x86/events/intel/core.c | 45 ++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Peter Zijlstra July 2, 2021, 11:28 a.m. UTC | #1 
On Tue, Jun 22, 2021 at 05:42:51PM +0800, Zhu Lingshan wrote:
> +DECLARE_STATIC_CALL(x86_guest_state, *(perf_guest_cbs->state));
> +
> +/*
> + * We may be running with guest PEBS events created by KVM, and the
> + * PEBS records are logged into the guest's DS and invisible to host.
> + *
> + * In the case of guest PEBS overflow, we only trigger a fake event
> + * to emulate the PEBS overflow PMI for guest PBES counters in KVM.
> + * The guest will then vm-entry and check the guest DS area to read
> + * the guest PEBS records.
> + *
> + * The contents and other behavior of the guest event do not matter.
> + */
> +static void x86_pmu_handle_guest_pebs(struct pt_regs *regs,
> +				      struct perf_sample_data *data)
> +{
> +	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> +	u64 guest_pebs_idxs = cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask;
> +	struct perf_event *event = NULL;
> +	unsigned int guest = 0;
> +	int bit;
> +
> +	if (!x86_pmu.pebs_vmx || !x86_pmu.pebs_active ||
> +	    !(cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask))
> +		return;
> +
> +	guest = static_call(x86_guest_state)();
> +	if (!(guest & PERF_GUEST_ACTIVE))
> +		return;

I think you've got the branches the wrong way around here; nobody runs a
VM so this branch will get you out without a load.

Only if you're one of those daft people running a VM, are you interested
in any of the other conditions that are required.

Also, I think both pebs_active and pebs_vmx can he a static_branch, but
that can be done later I suppose.
Zhu, Lingshan July 8, 2021, 1:39 p.m. UTC | #2 
On 7/2/2021 7:28 PM, Peter Zijlstra wrote:
> On Tue, Jun 22, 2021 at 05:42:51PM +0800, Zhu Lingshan wrote:
>> +DECLARE_STATIC_CALL(x86_guest_state, *(perf_guest_cbs->state));
>> +
>> +/*
>> + * We may be running with guest PEBS events created by KVM, and the
>> + * PEBS records are logged into the guest's DS and invisible to host.
>> + *
>> + * In the case of guest PEBS overflow, we only trigger a fake event
>> + * to emulate the PEBS overflow PMI for guest PBES counters in KVM.
>> + * The guest will then vm-entry and check the guest DS area to read
>> + * the guest PEBS records.
>> + *
>> + * The contents and other behavior of the guest event do not matter.
>> + */
>> +static void x86_pmu_handle_guest_pebs(struct pt_regs *regs,
>> +				      struct perf_sample_data *data)
>> +{
>> +	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>> +	u64 guest_pebs_idxs = cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask;
>> +	struct perf_event *event = NULL;
>> +	unsigned int guest = 0;
>> +	int bit;
>> +
>> +	if (!x86_pmu.pebs_vmx || !x86_pmu.pebs_active ||
>> +	    !(cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask))
>> +		return;
>> +
>> +	guest = static_call(x86_guest_state)();
>> +	if (!(guest & PERF_GUEST_ACTIVE))
>> +		return;
> I think you've got the branches the wrong way around here; nobody runs a
> VM so this branch will get you out without a load.
>
> Only if you're one of those daft people running a VM, are you interested
> in any of the other conditions that are required.
>
> Also, I think both pebs_active and pebs_vmx can he a static_branch, but
> that can be done later I suppose.
Hi Peter,

If I understand this correctly, are you suggesting we put "if (!(guest & 
PERF_GUEST_ACTIVE))" first because this is a lower cost branch?

Thanks,
Zhu Lingshan
diff mbox series

Patch

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 211b3767d7e6..b187cb6b72fa 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2781,6 +2781,50 @@  static void intel_pmu_reset(void)
 }
 
 DECLARE_STATIC_CALL(x86_guest_handle_intel_pt_intr, *(perf_guest_cbs->handle_intel_pt_intr));
+DECLARE_STATIC_CALL(x86_guest_state, *(perf_guest_cbs->state));
+
+/*
+ * We may be running with guest PEBS events created by KVM, and the
+ * PEBS records are logged into the guest's DS and invisible to host.
+ *
+ * In the case of guest PEBS overflow, we only trigger a fake event
+ * to emulate the PEBS overflow PMI for guest PBES counters in KVM.
+ * The guest will then vm-entry and check the guest DS area to read
+ * the guest PEBS records.
+ *
+ * The contents and other behavior of the guest event do not matter.
+ */
+static void x86_pmu_handle_guest_pebs(struct pt_regs *regs,
+				      struct perf_sample_data *data)
+{
+	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+	u64 guest_pebs_idxs = cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask;
+	struct perf_event *event = NULL;
+	unsigned int guest = 0;
+	int bit;
+
+	if (!x86_pmu.pebs_vmx || !x86_pmu.pebs_active ||
+	    !(cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask))
+		return;
+
+	guest = static_call(x86_guest_state)();
+	if (!(guest & PERF_GUEST_ACTIVE))
+		return;
+
+	for_each_set_bit(bit, (unsigned long *)&guest_pebs_idxs,
+			 INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed) {
+		event = cpuc->events[bit];
+		if (!event->attr.precise_ip)
+			continue;
+
+		perf_sample_data_init(data, 0, event->hw.last_period);
+		if (perf_event_overflow(event, data, regs))
+			x86_pmu_stop(event, 0);
+
+		/* Inject one fake event is enough. */
+		break;
+	}
+}
 
 static int handle_pmi_common(struct pt_regs *regs, u64 status)
 {
@@ -2833,6 +2877,7 @@  static int handle_pmi_common(struct pt_regs *regs, u64 status)
 		u64 pebs_enabled = cpuc->pebs_enabled;
 
 		handled++;
+		x86_pmu_handle_guest_pebs(regs, &data);
 		x86_pmu.drain_pebs(regs, &data);
 		status &= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;