| Message ID | 20210919063848.1476776-10-yi.l.liu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce /dev/iommu for userspace I/O address space management | expand |
Hi, On 9/19/21 8:38 AM, Liu Yi L wrote: > From: Lu Baolu <baolu.lu@linux.intel.com> > > This exposes PAGE_SIZE and ADDR_WIDTH attributes. The iommufd could use > them to define the IOAS. > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > --- > include/linux/iommu.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 943de6897f56..86d34e4ce05e 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -153,9 +153,13 @@ enum iommu_dev_features { > /** > * enum iommu_devattr - Per device IOMMU attributes > * @IOMMU_DEV_INFO_FORCE_SNOOP [bool]: IOMMU can force DMA to be snooped. > + * @IOMMU_DEV_INFO_PAGE_SIZE [u64]: Page sizes that iommu supports. > + * @IOMMU_DEV_INFO_ADDR_WIDTH [u32]: Address width supported. I think this deserves additional info. What address width do we talk about, input, output, what stage if the IOMMU does support multiple stages Thanks Eric > */ > enum iommu_devattr { > IOMMU_DEV_INFO_FORCE_SNOOP, > + IOMMU_DEV_INFO_PAGE_SIZE, > + IOMMU_DEV_INFO_ADDR_WIDTH, > }; > > #define IOMMU_PASID_INVALID (-1U)
> From: Eric Auger <eric.auger@redhat.com> > Sent: Wednesday, September 22, 2021 9:43 PM > > Hi, > > On 9/19/21 8:38 AM, Liu Yi L wrote: > > From: Lu Baolu <baolu.lu@linux.intel.com> > > > > This exposes PAGE_SIZE and ADDR_WIDTH attributes. The iommufd could > use > > them to define the IOAS. > > > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > > --- > > include/linux/iommu.h | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > > index 943de6897f56..86d34e4ce05e 100644 > > --- a/include/linux/iommu.h > > +++ b/include/linux/iommu.h > > @@ -153,9 +153,13 @@ enum iommu_dev_features { > > /** > > * enum iommu_devattr - Per device IOMMU attributes > > * @IOMMU_DEV_INFO_FORCE_SNOOP [bool]: IOMMU can force DMA to > be snooped. > > + * @IOMMU_DEV_INFO_PAGE_SIZE [u64]: Page sizes that iommu > supports. > > + * @IOMMU_DEV_INFO_ADDR_WIDTH [u32]: Address width supported. > I think this deserves additional info. What address width do we talk > about, input, output, what stage if the IOMMU does support multiple stages > it describes the address space width, thus is about input. when multiple stages are supported, each stage is represented by a separate ioasid, each with its own addr_width
diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 943de6897f56..86d34e4ce05e 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -153,9 +153,13 @@ enum iommu_dev_features { /** * enum iommu_devattr - Per device IOMMU attributes * @IOMMU_DEV_INFO_FORCE_SNOOP [bool]: IOMMU can force DMA to be snooped. + * @IOMMU_DEV_INFO_PAGE_SIZE [u64]: Page sizes that iommu supports. + * @IOMMU_DEV_INFO_ADDR_WIDTH [u32]: Address width supported. */ enum iommu_devattr { IOMMU_DEV_INFO_FORCE_SNOOP, + IOMMU_DEV_INFO_PAGE_SIZE, + IOMMU_DEV_INFO_ADDR_WIDTH, }; #define IOMMU_PASID_INVALID (-1U)