[01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded

Message ID	20211108124407.12187-2-jiangshanlai@gmail.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@kernel.org> From: Lai Jiangshan <jiangshanlai@gmail.com> To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com> Cc: Lai Jiangshan <laijs@linux.alibaba.com>, Sean Christopherson <seanjc@google.com>, Vitaly Kuznetsov <vkuznets@redhat.com>, Wanpeng Li <wanpengli@tencent.com>, Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>, Xiao Guangrong <guangrong.xiao@linux.intel.com> Subject: [PATCH 01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded Date: Mon, 8 Nov 2021 20:43:53 +0800 Message-Id: <20211108124407.12187-2-jiangshanlai@gmail.com> In-Reply-To: <20211108124407.12187-1-jiangshanlai@gmail.com> References: <20211108124407.12187-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	KVM: X86: Fix and clean up for register caches \| expand [00/15] KVM: X86: Fix and clean up for register caches [01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded [02/15] KVM: VMX: Mark VCPU_EXREG_PDPTR available in ept_save_pdptrs() [03/15] KVM: SVM: Always clear available of VCPU_EXREG_PDPTR in svm_vcpu_run() [04/15] KVM: VMX: Add and use X86_CR4_TLB_BITS when !enable_ept [05/15] KVM: VMX: Add and use X86_CR4_PDPTR_BITS when !enable_ept [06/15] KVM: X86: Move CR0 pdptr_bits into header file as X86_CR0_PDPTR_BITS [07/15] KVM: SVM: Remove outdated comment in svm_load_mmu_pgd() [08/15] KVM: SVM: Remove useless check in svm_load_mmu_pgd() [09/15] KVM: SVM: Remove the unneeded code to mark available for CR3 [10/15] KVM: X86: Mark CR3 dirty when vcpu->arch.cr3 is changed [11/15] KVM: VMX: Update vmcs.GUEST_CR3 only when the guest CR3 is dirty [12/15] KVM: VMX: Reset the bits that are meaningful to be reset in vmx_register_cache_reset() [13/15] KVM: SVM: Add and use svm_register_cache_reset() [14/15] KVM: X86: Remove kvm_register_clear_available() [15/15] KVM: nVMX: Always write vmcs.GUEST_CR3 during nested VM-Exit [16/15] KVM: X86: Update mmu->pdptrs only when it is changed [17/15] KVM: X86: Ensure pae_root to be reconstructed for shadow paging if the guest PDPTEs is chan…

Message ID

20211108124407.12187-2-jiangshanlai@gmail.com (mailing list archive)

State

New, archived

Headers

From: Lai Jiangshan <jiangshanlai@gmail.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        Paolo Bonzini <pbonzini@redhat.com>
Cc: Lai Jiangshan <laijs@linux.alibaba.com>,
        Sean Christopherson <seanjc@google.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
        Joerg Roedel <joro@8bytes.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
        Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: [PATCH 01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded
Date: Mon,  8 Nov 2021 20:43:53 +0800
Message-Id: <20211108124407.12187-2-jiangshanlai@gmail.com>
In-Reply-To: <20211108124407.12187-1-jiangshanlai@gmail.com>
References: <20211108124407.12187-1-jiangshanlai@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

KVM: X86: Fix and clean up for register caches | expand

Commit Message

Lai Jiangshan Nov. 8, 2021, 12:43 p.m. UTC

From: Lai Jiangshan <laijs@linux.alibaba.com>

For VMX, the dirty PDPTEs needs to be loaded before the coming VMENTER
via vmx_load_mmu_pgd() if EPT is enabled.

But not all paths that call load_pdptrs() will cause vmx_load_mmu_pgd()
to be invoked.  Normally, kvm_mmu_reset_context() and KVM_REQ_LOAD_MMU_PGD
are used to launch later vmx_load_mmu_pgd().

The commit d81135a57aa6("KVM: x86: do not reset mmu if CR0.CD and
CR0.NW are changed") skips kvm_mmu_reset_context() after load_pdptrs()
when changing CR0.CD and CR0.NW.

The commit 21823fbda552("KVM: x86: Invalidate all PGDs for the current
PCID on MOV CR3 w/ flush") skips KVM_REQ_LOAD_MMU_PGD after
load_pdptrs() when rewriting the CR3 with the same value.

The commit a91a7c709600("KVM: X86: Don't reset mmu context when
toggling X86_CR4_PGE") skips kvm_mmu_reset_context() after
load_pdptrs() when changing CR4.PGE.

Fixes: d81135a57aa6("KVM: x86: do not reset mmu if CR0.CD and CR0.NW are changed")
Fixes: 21823fbda552("KVM: x86: Invalidate all PGDs for the current PCID on MOV CR3 w/ flush")
Fixes: a91a7c709600("KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE")
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
---
 arch/x86/kvm/x86.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index ac83d873d65b..034c233ea5a1 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -830,6 +830,8 @@  int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 
 	memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 	kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
+	/* Ensure the dirty PDPTEs to be loaded. */
+	kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 	vcpu->arch.pdptrs_from_userspace = false;
 
 	return 1;

[01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded

Commit Message

Patch