| Message ID | 20211124122055.64424-12-jiangshanlai@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: X86: misc fixes and cleanup | expand |
On 11/24/21 13:20, Lai Jiangshan wrote: > From: Lai Jiangshan <laijs@linux.alibaba.com> > > If root_level >= 4, shadow_root_level must be >= 4 too. > Checking only root_level can reduce a check. > > Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com> > --- > arch/x86/kvm/mmu/mmu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index 9fb9927264d8..1dc8bfd12ecd 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -4136,8 +4136,7 @@ static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, > * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs > * later if necessary. > */ > - if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && > - mmu->root_level >= PT64_ROOT_4LEVEL) > + if (mmu->root_level >= PT64_ROOT_4LEVEL) > return cached_root_available(vcpu, new_pgd, new_role); > > return false; > Hmm, I think this is more confusing. I *think* that adding support for PAE would be mostly an issue with the guest PDPTRs, and not with the shadow PDPTRs, but without thinking more about it I'm leaning towards not applying this patch. Paolo
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 9fb9927264d8..1dc8bfd12ecd 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4136,8 +4136,7 @@ static bool fast_pgd_switch(struct kvm_vcpu *vcpu, gpa_t new_pgd, * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs * later if necessary. */ - if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && - mmu->root_level >= PT64_ROOT_4LEVEL) + if (mmu->root_level >= PT64_ROOT_4LEVEL) return cached_root_available(vcpu, new_pgd, new_role); return false;