| Message ID | 20211208000359.2853257-13-yang.zhong@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | AMX Support in KVM | expand |
On Tue, Dec 07 2021 at 19:03, Yang Zhong wrote: > From: Thomas Gleixner <tglx@linutronix.de> > > Guest may toggle IA32_XFD in high frequency as it is part of the fpstate > information (features, sizes, xfd) and swapped in task context switch. > > To minimize the trap overhead of writes to this MSR, one optimization > is to allow guest direct write thus eliminate traps. However MSR > passthrough implies that guest_fpstate::xfd and per-cpu xfd cache might > be out of sync with the current IA32_XFD value by the guest. > > This suggests KVM needs to re-sync guest_fpstate::xfd and per-cpu cache > with IA32_XFD before the vCPU thread might be preempted or interrupted. > > This patch provides a helper function for the re-sync purpose. Provide a .... > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > Signed-off-by: Jing Liu <jing2.liu@intel.com> > Signed-off-by: Yang Zhong <yang.zhong@intel.com> > --- > (To Thomas): the original name kvm_update_guest_xfd_state() in > your sample code is renamed to xfd_sync_state() in this patch. In > concept it is a general helper to bring software values in-sync with > the MSR value after they become out-of-sync. KVM is just the > first out-of-sync usage on this helper, so a neutral name may make > more sense. But if you prefer to the original name we can also > change back. There is no need for a general helper, really. It's KVM specific and should go into KVM section in core.c next to the other thing vs. the XFD update. Thanks, tglx
diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h index cd3dd170e23a..c8b51d34daab 100644 --- a/arch/x86/include/asm/fpu/xstate.h +++ b/arch/x86/include/asm/fpu/xstate.h @@ -129,4 +129,6 @@ static __always_inline __pure bool fpu_state_size_dynamic(void) } #endif +extern void xfd_sync_state(void); + #endif diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index 3c39789deeb9..a5656237a763 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -1762,11 +1762,25 @@ void xfd_update_state(struct fpstate *fpstate) } } EXPORT_SYMBOL_GPL(xfd_update_state); + +/* Bring software state in sync with the current MSR value */ +void xfd_sync_state(void) +{ + if (fpu_state_size_dynamic()) { + u64 xfd; + + rdmsrl(MSR_IA32_XFD, xfd); + current->thread.fpu.fpstate->xfd = xfd; + __this_cpu_write(xfd_state, xfd); + } +} +EXPORT_SYMBOL_GPL(xfd_sync_state); #else /* CONFIG_X86_64 */ static inline int xstate_request_perm(unsigned long idx, bool guest) { return -EPERM; } +void xfd_sync_state(void) {} #endif /* !CONFIG_X86_64 */ inline u64 xstate_get_guest_group_perm(void)