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David Alan Gilbert" , , , , Brijesh Singh Subject: [PATCH v8 18/40] KVM: SVM: Create a separate mapping for the GHCB save area Date: Fri, 10 Dec 2021 09:43:10 -0600 Message-ID: <20211210154332.11526-19-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211210154332.11526-1-brijesh.singh@amd.com> References: <20211210154332.11526-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 13489d80-4a66-4e9c-af8d-08d9bbf3ee54 X-MS-TrafficTypeDiagnostic: DM6PR12MB4057:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w09wtNkCl2PGJeqXkHP4JXaEzb8qkVOshnFyVwRq/1tqqeBbfmJzlHAH6JWqxUGys01sEXs89KE5Gqdp93ZcOU2WXZ+CvgO46fT8ZmtUwUlQdiUk8UQoOZ4C6S1ik6CMMrnOyCmqGLWBG25AW/gmdYAZBKbzFf5s//FHEkd5Zrqo2+K2IHj2MNSJug3K6VbsbYyUfLn49PDeRKKc1OGdGGiLMZtsjUo1gogbKCKPmuiLmKXmbshWqHXuANGzJ8ok77rJ3Bp0PU4zha5vLFvSLOtkU6aFlDIj6gHHz0Rt5dhS1z3VbW59Jl7GjqMNql9KLnh3LKw2LCOXdxIrLmXj6SZbJ/FHcsRHLy6mGNATGVcJQakdE0gbpDOWzAOP3HUuyupJJPH53+GDME3qnGJERd5x5PKYDuiQINBREbFwYujNJ8HaZdAoZV+f4mKDQrgy6ui+jeVubHMExXU6xNMnOeMvqYt3nFx4gO/jWFYNDSP20aTj3ciJzuzKh62pn3X3JrSu+hPCjvVsAPQdkJFjYv2vwnGyDM0QY82ZvAEXaApn0UKuf17W8hvg/x45/jG7pSyBkKCUhuykfRFQ5h5u100f9v8EmJRGDW7qHYW6Oo9p9q9cRwlj7nGQXdJmdHAeqy44BJKLrUWuPtNXecep+3D1AMhfcgdDqrqamxBXwfXtEVKDFUvgHphZTMCL331Ri6qRu1UVvpf8RIpoIY4oqHRzcWO0P7Y0btrQGYIbOVs8obM4PsPFPIQPxRP9m5Bqa2w0rfMUIEPTBqhbx1+4ksJ+ecPO4aI5QarGIcqqghuuc0nqVBQj5HaJ6Bc8BVPK X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(40470700001)(16526019)(5660300002)(186003)(26005)(6666004)(7696005)(1076003)(47076005)(36860700001)(2616005)(336012)(508600001)(44832011)(8676002)(426003)(83380400001)(8936002)(82310400004)(36756003)(86362001)(40460700001)(356005)(81166007)(2906002)(316002)(4326008)(110136005)(54906003)(7416002)(70586007)(7406005)(70206006)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2021 15:44:19.8672 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 13489d80-4a66-4e9c-af8d-08d9bbf3ee54 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT067.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4057 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Tom Lendacky The initial implementation of the GHCB spec was based on trying to keep the register state offsets the same relative to the VM save area. However, the save area for SEV-ES has changed within the hardware causing the relation between the SEV-ES save area to change relative to the GHCB save area. This is the second step in defining the multiple save areas to keep them separate and ensuring proper operation amongst the different types of guests. Create a GHCB save area that matches the GHCB specification. Signed-off-by: Tom Lendacky Signed-off-by: Brijesh Singh Reviewed-by: Venu Busireddy --- arch/x86/include/asm/svm.h | 48 +++++++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 3ce2e575a2de..5ff1fa364a31 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -354,11 +354,51 @@ struct sev_es_save_area { u64 x87_state_gpa; } __packed; +struct ghcb_save_area { + u8 reserved_1[203]; + u8 cpl; + u8 reserved_2[116]; + u64 xss; + u8 reserved_3[24]; + u64 dr7; + u8 reserved_4[16]; + u64 rip; + u8 reserved_5[88]; + u64 rsp; + u8 reserved_6[24]; + u64 rax; + u8 reserved_7[264]; + u64 rcx; + u64 rdx; + u64 rbx; + u8 reserved_8[8]; + u64 rbp; + u64 rsi; + u64 rdi; + u64 r8; + u64 r9; + u64 r10; + u64 r11; + u64 r12; + u64 r13; + u64 r14; + u64 r15; + u8 reserved_9[16]; + u64 sw_exit_code; + u64 sw_exit_info_1; + u64 sw_exit_info_2; + u64 sw_scratch; + u8 reserved_10[56]; + u64 xcr0; + u8 valid_bitmap[16]; + u64 x87_state_gpa; +} __packed; + #define GHCB_SHARED_BUF_SIZE 2032 struct ghcb { - struct sev_es_save_area save; - u8 reserved_save[2048 - sizeof(struct sev_es_save_area)]; + struct ghcb_save_area save; + u8 reserved_save[2048 - sizeof(struct ghcb_save_area)]; u8 shared_buffer[GHCB_SHARED_BUF_SIZE]; @@ -369,6 +409,7 @@ struct ghcb { #define EXPECTED_VMCB_SAVE_AREA_SIZE 740 +#define EXPECTED_GHCB_SAVE_AREA_SIZE 1032 #define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1032 #define EXPECTED_VMCB_CONTROL_AREA_SIZE 1024 #define EXPECTED_GHCB_SIZE PAGE_SIZE @@ -376,6 +417,7 @@ struct ghcb { static inline void __unused_size_checks(void) { BUILD_BUG_ON(sizeof(struct vmcb_save_area) != EXPECTED_VMCB_SAVE_AREA_SIZE); + BUILD_BUG_ON(sizeof(struct ghcb_save_area) != EXPECTED_GHCB_SAVE_AREA_SIZE); BUILD_BUG_ON(sizeof(struct sev_es_save_area) != EXPECTED_SEV_ES_SAVE_AREA_SIZE); BUILD_BUG_ON(sizeof(struct vmcb_control_area) != EXPECTED_VMCB_CONTROL_AREA_SIZE); BUILD_BUG_ON(sizeof(struct ghcb) != EXPECTED_GHCB_SIZE); @@ -446,7 +488,7 @@ struct vmcb { /* GHCB Accessor functions */ #define GHCB_BITMAP_IDX(field) \ - (offsetof(struct sev_es_save_area, field) / sizeof(u64)) + (offsetof(struct ghcb_save_area, field) / sizeof(u64)) #define DEFINE_GHCB_ACCESSORS(field) \ static inline bool ghcb_##field##_is_valid(const struct ghcb *ghcb) \