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David Alan Gilbert" , , , , Brijesh Singh Subject: [PATCH v8 02/40] x86/sev: detect/setup SEV/SME features earlier in boot Date: Fri, 10 Dec 2021 09:42:54 -0600 Message-ID: <20211210154332.11526-3-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211210154332.11526-1-brijesh.singh@amd.com> References: <20211210154332.11526-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e3d43492-4cfc-4071-a949-08d9bbf3dea8 X-MS-TrafficTypeDiagnostic: BL0PR12MB4756:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RxgfgUvhdLJGnoS/kmO0falfCKIBYH6JfGQEozPykliZ3fmRVMjjJv631BggWnxE0w09l3I6nJgAng/AyPF41kB+XsVFie++isvpuDLli322g7GSgsY+tA1zjd10TfKTezEFSHVpEAK+kZZ6mQ3xQ08CvuAaIYof05Sab6URDW2gQB/ZRXZofV0yX7ijSEnDDi8GA1aBEQAg0oZYww578oAQTMAbJeGVbUsh71Bg4n0yIGWgqrLOPKisxVwTZMjAh/wqfkicdhvgW6G5YiSC9rwhsRQvHwjxkczWZho1V5mK8sLYnFh6lppwZABDBqoIL4a32L6KCGFXziQ+EaLwo3Ej9m7QM0ZAO9nsh22lCKbD7ReP3bzIR2afYsjNODxlScChkULmshLa3LtPcH4npCZj5LOnPkJP66Ty09zMHKMQUKDhpF6thlw7laypkmswlHqPHwML00lagV8/Qa7CofuU7S2BDMqgPE+yG1Y202RL3BI0CiGh/qk+s3mlsTPgXFim3+2MC+PWbiQvM6j+UdhETwZBYcSLyMf1WPfiKhNhBNvPQ8mHGktf/xCehR8MzEUD8UrvPPx+VpJTPeAbEoa5MhQpEF28DIvJkKzuxgoHChuvMoGsX9WymGer+HUKA3Ltg5TWgtYuqpZDrj7ho9nUVk22U+wKyEn6Vb+EYsJfr3IIDqWzGepHCkUlEKwyx8ukySKS9nXf2YUJ8IfwXL1PCajbCqIstNxiwPYbrOnCvO0JvSLzsr2fIRxQJsLKaV6ChSU+7cTfrfwpqiynjaE737MVdOCp0+By88rVPD9aRMR0yjZ/kRdZolSIo1B+ X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(40470700001)(7696005)(4326008)(47076005)(86362001)(44832011)(1076003)(8676002)(7416002)(8936002)(81166007)(83380400001)(36756003)(5660300002)(36860700001)(7406005)(356005)(70206006)(316002)(70586007)(110136005)(82310400004)(54906003)(2906002)(508600001)(40460700001)(2616005)(426003)(336012)(16526019)(186003)(26005)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2021 15:43:53.6194 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e3d43492-4cfc-4071-a949-08d9bbf3dea8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4756 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Michael Roth sme_enable() handles feature detection for both SEV and SME. Future patches will also use it for SEV-SNP feature detection/setup, which will need to be done immediately after the first #VC handler is set up. Move it now in preparation. Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh Reviewed-by: Venu Busireddy --- arch/x86/kernel/head64.c | 3 --- arch/x86/kernel/head_64.S | 13 +++++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 3be9dd213dad..b01f64e8389b 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -192,9 +192,6 @@ unsigned long __head __startup_64(unsigned long physaddr, if (load_delta & ~PMD_PAGE_MASK) for (;;); - /* Activate Secure Memory Encryption (SME) if supported and enabled */ - sme_enable(bp); - /* Include the SME encryption mask in the fixup value */ load_delta += sme_get_me_mask(); diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index d8b3ebd2bb85..99de8fd461e8 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -69,6 +69,19 @@ SYM_CODE_START_NOALIGN(startup_64) call startup_64_setup_env popq %rsi +#ifdef CONFIG_AMD_MEM_ENCRYPT + /* + * Activate SEV/SME memory encryption if supported/enabled. This needs to + * be done now, since this also includes setup of the SEV-SNP CPUID table, + * which needs to be done before any CPUID instructions are executed in + * subsequent code. + */ + movq %rsi, %rdi + pushq %rsi + call sme_enable + popq %rsi +#endif + /* Now switch to __KERNEL_CS so IRET works reliably */ pushq $__KERNEL_CS leaq .Lon_kernel_cs(%rip), %rax