From patchwork Wed Jan 12 08:13:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yifei Jiang X-Patchwork-Id: 12710998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 327CCC433FE for ; Wed, 12 Jan 2022 08:14:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351516AbiALIOF (ORCPT ); Wed, 12 Jan 2022 03:14:05 -0500 Received: from szxga01-in.huawei.com ([45.249.212.187]:16705 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351489AbiALIOC (ORCPT ); Wed, 12 Jan 2022 03:14:02 -0500 Received: from kwepemi500008.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4JYgGm233bzZf5t; Wed, 12 Jan 2022 16:10:24 +0800 (CST) Received: from kwepemm600017.china.huawei.com (7.193.23.234) by kwepemi500008.china.huawei.com (7.221.188.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.20; Wed, 12 Jan 2022 16:14:00 +0800 Received: from huawei.com (10.174.186.236) by kwepemm600017.china.huawei.com (7.193.23.234) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.20; Wed, 12 Jan 2022 16:13:59 +0800 From: Yifei Jiang To: , CC: , , , , , , , , , , , Yifei Jiang , Mingwang Li Subject: [PATCH v5 13/13] target/riscv: enable riscv kvm accel Date: Wed, 12 Jan 2022 16:13:29 +0800 Message-ID: <20220112081329.1835-14-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20220112081329.1835-1-jiangyifei@huawei.com> References: <20220112081329.1835-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.186.236] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To kwepemm600017.china.huawei.com (7.193.23.234) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add riscv kvm support in meson.build file. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index c1b1db1e28..06a5476254 100644 --- a/meson.build +++ b/meson.build @@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64'] kvm_targets = ['ppc-softmmu', 'ppc64-softmmu'] elif cpu in ['mips', 'mips64'] kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu'] +elif cpu in ['riscv'] + kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu'] else kvm_targets = [] endif