Message ID | 20220209164420.8894-7-varad.gautam@suse.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add #VC exception handling for AMD SEV-ES | expand |
On Wed, Feb 9, 2022 at 8:44 AM Varad Gautam <varad.gautam@suse.com> wrote: > > Processing CPUID #VC for AMD SEV-ES requires copying xcr0 into GHCB. > Move the xsave read/write helpers used by xsave testcase to lib/x86 > to share as common code. > > Signed-off-by: Varad Gautam <varad.gautam@suse.com> > --- > lib/x86/xsave.c | 37 +++++++++++++++++++++++++++++++++++++ > lib/x86/xsave.h | 16 ++++++++++++++++ > x86/Makefile.common | 1 + > x86/xsave.c | 43 +------------------------------------------ > 4 files changed, 55 insertions(+), 42 deletions(-) > create mode 100644 lib/x86/xsave.c > create mode 100644 lib/x86/xsave.h > > diff --git a/lib/x86/xsave.c b/lib/x86/xsave.c > new file mode 100644 > index 0000000..1c0f16e > --- /dev/null > +++ b/lib/x86/xsave.c > @@ -0,0 +1,37 @@ > +#include "libcflat.h" > +#include "xsave.h" > +#include "processor.h" > + > +int xgetbv_checking(u32 index, u64 *result) > +{ > + u32 eax, edx; > + > + asm volatile(ASM_TRY("1f") > + ".byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ > + "1:" > + : "=a" (eax), "=d" (edx) > + : "c" (index)); > + *result = eax + ((u64)edx << 32); > + return exception_vector(); > +} > + > +int xsetbv_checking(u32 index, u64 value) > +{ > + u32 eax = value; > + u32 edx = value >> 32; > + > + asm volatile(ASM_TRY("1f") > + ".byte 0x0f,0x01,0xd1\n\t" /* xsetbv */ > + "1:" > + : : "a" (eax), "d" (edx), "c" (index)); > + return exception_vector(); > +} > + > +uint64_t get_supported_xcr0(void) > +{ > + struct cpuid r; > + r = cpuid_indexed(0xd, 0); > + printf("eax %x, ebx %x, ecx %x, edx %x\n", > + r.a, r.b, r.c, r.d); > + return r.a + ((u64)r.d << 32); > +} > diff --git a/lib/x86/xsave.h b/lib/x86/xsave.h > new file mode 100644 > index 0000000..f1851a3 > --- /dev/null > +++ b/lib/x86/xsave.h > @@ -0,0 +1,16 @@ > +#ifndef _X86_XSAVE_H_ > +#define _X86_XSAVE_H_ > + > +#define X86_CR4_OSXSAVE 0x00040000 > +#define XCR_XFEATURE_ENABLED_MASK 0x00000000 > +#define XCR_XFEATURE_ILLEGAL_MASK 0x00000010 > + > +#define XSTATE_FP 0x1 > +#define XSTATE_SSE 0x2 > +#define XSTATE_YMM 0x4 > + > +int xgetbv_checking(u32 index, u64 *result); > +int xsetbv_checking(u32 index, u64 value); > +uint64_t get_supported_xcr0(void); > + > +#endif > diff --git a/x86/Makefile.common b/x86/Makefile.common > index 2496d81..aa30948 100644 > --- a/x86/Makefile.common > +++ b/x86/Makefile.common > @@ -22,6 +22,7 @@ cflatobjs += lib/x86/acpi.o > cflatobjs += lib/x86/stack.o > cflatobjs += lib/x86/fault_test.o > cflatobjs += lib/x86/delay.o > +cflatobjs += lib/x86/xsave.o > ifeq ($(TARGET_EFI),y) > cflatobjs += lib/x86/amd_sev.o > cflatobjs += lib/x86/amd_sev_vc.o > diff --git a/x86/xsave.c b/x86/xsave.c > index 892bf56..bd8fe11 100644 > --- a/x86/xsave.c > +++ b/x86/xsave.c > @@ -1,6 +1,7 @@ > #include "libcflat.h" > #include "desc.h" > #include "processor.h" > +#include "xsave.h" > > #ifdef __x86_64__ > #define uint64_t unsigned long > @@ -8,48 +9,6 @@ > #define uint64_t unsigned long long > #endif > > -static int xgetbv_checking(u32 index, u64 *result) > -{ > - u32 eax, edx; > - > - asm volatile(ASM_TRY("1f") > - ".byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ > - "1:" > - : "=a" (eax), "=d" (edx) > - : "c" (index)); > - *result = eax + ((u64)edx << 32); > - return exception_vector(); > -} > - > -static int xsetbv_checking(u32 index, u64 value) > -{ > - u32 eax = value; > - u32 edx = value >> 32; > - > - asm volatile(ASM_TRY("1f") > - ".byte 0x0f,0x01,0xd1\n\t" /* xsetbv */ > - "1:" > - : : "a" (eax), "d" (edx), "c" (index)); > - return exception_vector(); > -} > - > -static uint64_t get_supported_xcr0(void) > -{ > - struct cpuid r; > - r = cpuid_indexed(0xd, 0); > - printf("eax %x, ebx %x, ecx %x, edx %x\n", > - r.a, r.b, r.c, r.d); > - return r.a + ((u64)r.d << 32); > -} > - > -#define X86_CR4_OSXSAVE 0x00040000 > -#define XCR_XFEATURE_ENABLED_MASK 0x00000000 > -#define XCR_XFEATURE_ILLEGAL_MASK 0x00000010 > - > -#define XSTATE_FP 0x1 > -#define XSTATE_SSE 0x2 > -#define XSTATE_YMM 0x4 > - > static void test_xsave(void) > { > unsigned long cr4; > -- > 2.32.0 > Reviewed-by: Marc Orr <marcorr@google.com>
diff --git a/lib/x86/xsave.c b/lib/x86/xsave.c new file mode 100644 index 0000000..1c0f16e --- /dev/null +++ b/lib/x86/xsave.c @@ -0,0 +1,37 @@ +#include "libcflat.h" +#include "xsave.h" +#include "processor.h" + +int xgetbv_checking(u32 index, u64 *result) +{ + u32 eax, edx; + + asm volatile(ASM_TRY("1f") + ".byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ + "1:" + : "=a" (eax), "=d" (edx) + : "c" (index)); + *result = eax + ((u64)edx << 32); + return exception_vector(); +} + +int xsetbv_checking(u32 index, u64 value) +{ + u32 eax = value; + u32 edx = value >> 32; + + asm volatile(ASM_TRY("1f") + ".byte 0x0f,0x01,0xd1\n\t" /* xsetbv */ + "1:" + : : "a" (eax), "d" (edx), "c" (index)); + return exception_vector(); +} + +uint64_t get_supported_xcr0(void) +{ + struct cpuid r; + r = cpuid_indexed(0xd, 0); + printf("eax %x, ebx %x, ecx %x, edx %x\n", + r.a, r.b, r.c, r.d); + return r.a + ((u64)r.d << 32); +} diff --git a/lib/x86/xsave.h b/lib/x86/xsave.h new file mode 100644 index 0000000..f1851a3 --- /dev/null +++ b/lib/x86/xsave.h @@ -0,0 +1,16 @@ +#ifndef _X86_XSAVE_H_ +#define _X86_XSAVE_H_ + +#define X86_CR4_OSXSAVE 0x00040000 +#define XCR_XFEATURE_ENABLED_MASK 0x00000000 +#define XCR_XFEATURE_ILLEGAL_MASK 0x00000010 + +#define XSTATE_FP 0x1 +#define XSTATE_SSE 0x2 +#define XSTATE_YMM 0x4 + +int xgetbv_checking(u32 index, u64 *result); +int xsetbv_checking(u32 index, u64 value); +uint64_t get_supported_xcr0(void); + +#endif diff --git a/x86/Makefile.common b/x86/Makefile.common index 2496d81..aa30948 100644 --- a/x86/Makefile.common +++ b/x86/Makefile.common @@ -22,6 +22,7 @@ cflatobjs += lib/x86/acpi.o cflatobjs += lib/x86/stack.o cflatobjs += lib/x86/fault_test.o cflatobjs += lib/x86/delay.o +cflatobjs += lib/x86/xsave.o ifeq ($(TARGET_EFI),y) cflatobjs += lib/x86/amd_sev.o cflatobjs += lib/x86/amd_sev_vc.o diff --git a/x86/xsave.c b/x86/xsave.c index 892bf56..bd8fe11 100644 --- a/x86/xsave.c +++ b/x86/xsave.c @@ -1,6 +1,7 @@ #include "libcflat.h" #include "desc.h" #include "processor.h" +#include "xsave.h" #ifdef __x86_64__ #define uint64_t unsigned long @@ -8,48 +9,6 @@ #define uint64_t unsigned long long #endif -static int xgetbv_checking(u32 index, u64 *result) -{ - u32 eax, edx; - - asm volatile(ASM_TRY("1f") - ".byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ - "1:" - : "=a" (eax), "=d" (edx) - : "c" (index)); - *result = eax + ((u64)edx << 32); - return exception_vector(); -} - -static int xsetbv_checking(u32 index, u64 value) -{ - u32 eax = value; - u32 edx = value >> 32; - - asm volatile(ASM_TRY("1f") - ".byte 0x0f,0x01,0xd1\n\t" /* xsetbv */ - "1:" - : : "a" (eax), "d" (edx), "c" (index)); - return exception_vector(); -} - -static uint64_t get_supported_xcr0(void) -{ - struct cpuid r; - r = cpuid_indexed(0xd, 0); - printf("eax %x, ebx %x, ecx %x, edx %x\n", - r.a, r.b, r.c, r.d); - return r.a + ((u64)r.d << 32); -} - -#define X86_CR4_OSXSAVE 0x00040000 -#define XCR_XFEATURE_ENABLED_MASK 0x00000000 -#define XCR_XFEATURE_ILLEGAL_MASK 0x00000010 - -#define XSTATE_FP 0x1 -#define XSTATE_SSE 0x2 -#define XSTATE_YMM 0x4 - static void test_xsave(void) { unsigned long cr4;
Processing CPUID #VC for AMD SEV-ES requires copying xcr0 into GHCB. Move the xsave read/write helpers used by xsave testcase to lib/x86 to share as common code. Signed-off-by: Varad Gautam <varad.gautam@suse.com> --- lib/x86/xsave.c | 37 +++++++++++++++++++++++++++++++++++++ lib/x86/xsave.h | 16 ++++++++++++++++ x86/Makefile.common | 1 + x86/xsave.c | 43 +------------------------------------------ 4 files changed, 55 insertions(+), 42 deletions(-) create mode 100644 lib/x86/xsave.c create mode 100644 lib/x86/xsave.h