diff mbox series

[kvm-unit-tests,GIT,PULL,7/9] s390x: firq: use CPU indexes instead of addresses

Message ID 20220217143504.232688-8-imbrenda@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series s390x: smp lib improvements and more | expand

Commit Message

Claudio Imbrenda Feb. 17, 2022, 2:35 p.m. UTC 
Adapt the test to the new semantics of the smp_* functions, and use CPU
indexes instead of addresses.

replace the checks with asserts, the 3 CPUs are guaranteed to be there.

Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Reviewed-by: Nico Boehr <nrb@linux.ibm.com>
Reviewed-by: Steffen Eiden <seiden@linux.ibm.com>
---
 s390x/firq.c | 26 ++++++--------------------
 1 file changed, 6 insertions(+), 20 deletions(-)
diff mbox series

Patch

diff --git a/s390x/firq.c b/s390x/firq.c
index fb9a2906..b4b3542e 100644
--- a/s390x/firq.c
+++ b/s390x/firq.c
@@ -44,24 +44,13 @@  static void test_wait_state_delivery(void)
 		goto out;
 	}
 
-	if (stap()) {
-		report_skip("need to start on CPU #0");
-		goto out;
-	}
-
-	/*
-	 * We want CPU #2 to be stopped. This should be the case at this
-	 * point, however, we want to sense if it even exists as well.
-	 */
+	/* Stop CPU #2. It must succeed because we have at least 3 CPUs */
 	ret = smp_cpu_stop(2);
-	if (ret) {
-		report_skip("CPU #2 not found");
-		goto out;
-	}
+	assert(!ret);
 
 	/*
-	 * We're going to perform an SCLP service call but expect
-	 * the interrupt on CPU #1 while it is in the wait state.
+	 * We're going to perform an SCLP service call but expect the
+	 * interrupt on CPU #1 while it is in the wait state.
 	 */
 	sclp_mark_busy();
 
@@ -69,11 +58,8 @@  static void test_wait_state_delivery(void)
 	psw.mask = extract_psw_mask();
 	psw.addr = (unsigned long)wait_for_sclp_int;
 	ret = smp_cpu_setup(1, psw);
-	if (ret) {
-		sclp_clear_busy();
-		report_skip("cpu #1 not found");
-		goto out;
-	}
+	/* This must not fail because we have at least 3 CPUs */
+	assert(!ret);
 
 	/*
 	 * We'd have to jump trough some hoops to sense e.g., via SIGP