@@ -41,6 +41,7 @@
#include <asm/desc.h>
#include <asm/ldt.h>
#include <asm/unwind.h>
+#include <asm/tsc.h>
#include "perf_event.h"
@@ -2728,16 +2729,26 @@ void arch_perf_update_userpage(struct perf_event *event,
!!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT);
userpg->pmc_width = x86_pmu.cntval_bits;
- if (event->attr.use_clockid && event->attr.clockid == CLOCK_PERF_HW_CLOCK) {
- userpg->cap_user_time_zero = 1;
- userpg->time_mult = 1;
- userpg->time_shift = 0;
- userpg->time_offset = 0;
- userpg->time_zero = 0;
- return;
+ if (event->attr.use_clockid) {
+ if (event->attr.clockid == CLOCK_PERF_HW_CLOCK) {
+ userpg->cap_user_time_zero = 1;
+ userpg->time_mult = 1;
+ userpg->time_shift = 0;
+ userpg->time_offset = 0;
+ userpg->time_zero = 0;
+ return;
+ }
+ if (event->attr.clockid == CLOCK_PERF_HW_CLOCK_NS)
+ userpg->cap_user_time_zero = 1;
+ }
+
+ if (using_native_sched_clock() && sched_clock_stable()) {
+ userpg->cap_user_time = 1;
+ if (!event->attr.use_clockid)
+ userpg->cap_user_time_zero = 1;
}
- if (!using_native_sched_clock() || !sched_clock_stable())
+ if (!userpg->cap_user_time && !userpg->cap_user_time_zero)
return;
cyc2ns_read_begin(&data);
@@ -2748,19 +2759,16 @@ void arch_perf_update_userpage(struct perf_event *event,
* Internal timekeeping for enabled/running/stopped times
* is always in the local_clock domain.
*/
- userpg->cap_user_time = 1;
userpg->time_mult = data.cyc2ns_mul;
userpg->time_shift = data.cyc2ns_shift;
userpg->time_offset = offset - now;
/*
* cap_user_time_zero doesn't make sense when we're using a different
- * time base for the records.
+ * time base for the records, except for CLOCK_PERF_HW_CLOCK_NS.
*/
- if (!event->attr.use_clockid) {
- userpg->cap_user_time_zero = 1;
+ if (userpg->cap_user_time_zero)
userpg->time_zero = offset;
- }
cyc2ns_read_end();
}
@@ -2994,6 +3002,11 @@ u64 perf_hw_clock(void)
return rdtsc_ordered();
}
+u64 perf_hw_clock_ns(void)
+{
+ return native_sched_clock_from_tsc(perf_hw_clock());
+}
+
void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
{
cap->version = x86_pmu.version;
@@ -453,6 +453,8 @@ extern unsigned long perf_misc_flags(struct pt_regs *regs);
extern u64 perf_hw_clock(void);
#define perf_hw_clock perf_hw_clock
+extern u64 perf_hw_clock_ns(void);
+#define perf_hw_clock_ns perf_hw_clock_ns
#include <asm/stacktrace.h>
@@ -77,6 +77,12 @@ struct timezone {
* paravirtualized. Note the warning above can also apply to TSC.
*/
#define CLOCK_PERF_HW_CLOCK 0x10000000
+/*
+ * Same as CLOCK_PERF_HW_CLOCK but in nanoseconds. Note support of
+ * CLOCK_PERF_HW_CLOCK_NS does not necesssarily imply support of
+ * CLOCK_PERF_HW_CLOCK or vice versa.
+ */
+#define CLOCK_PERF_HW_CLOCK_NS 0x10000001
/*
* The various flags for setting POSIX.1b interval timers:
@@ -12040,6 +12040,12 @@ static int perf_event_set_clock(struct perf_event *event, clockid_t clk_id)
nmi_safe = true;
break;
#endif
+#ifdef perf_hw_clock_ns
+ case CLOCK_PERF_HW_CLOCK_NS:
+ event->clock = &perf_hw_clock_ns;
+ nmi_safe = true;
+ break;
+#endif
default:
return -EINVAL;
Currently, when Intel PT is used within a VM guest, it is not possible to make use of TSC because perf clock is subject to paravirtualization. If the hypervisor leaves rdtsc alone, the TSC value will be subject only to the VMCS TSC Offset and Scaling, the same as the TSC packet from Intel PT. The new clock is based on rdtsc and not subject to paravirtualization. Hence it would be possible to use this new clock for Intel PT decoding within a VM guest. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> --- arch/x86/events/core.c | 39 ++++++++++++++++++++----------- arch/x86/include/asm/perf_event.h | 2 ++ include/uapi/linux/time.h | 6 +++++ kernel/events/core.c | 6 +++++ 4 files changed, 40 insertions(+), 13 deletions(-)