| Message ID | 20220308163926.563994-7-suravee.suthikulpanit@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introducing AMD x2APIC Virtualization (x2AVIC) support. | expand |
On Tue, 2022-03-08 at 10:39 -0600, Suravee Suthikulpanit wrote: > In X2APIC mode the Logical Destination Register is read-only, > which provides a fixed mapping between the logical and physical > APIC IDs. Therefore, there is no Logical APIC ID table in X2AVIC > and the processor uses the X2APIC ID in the backing page to create > a vCPU’s logical ID. Also, when x2AVIC is activated, a guest write > to the x2APIC LDR register would result in #GP injection into > the guest by the hardware. > > Therefore, add logic to check x2APIC mode before updating logical > APIC ID table. > > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > --- > arch/x86/kvm/svm/avic.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c > index 5329b93dc4cd..4d7a8743196e 100644 > --- a/arch/x86/kvm/svm/avic.c > +++ b/arch/x86/kvm/svm/avic.c > @@ -406,6 +406,10 @@ static int avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ldr) > bool flat; > u32 *entry, new_entry; > > + /* Note: x2AVIC does not use logical APIC ID table */ > + if (apic_x2apic_mode(vcpu->arch.apic)) > + return 0; > + > flat = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR) == APIC_DFR_FLAT; > entry = avic_get_logical_id_entry(vcpu, ldr, flat); > if (!entry) > @@ -424,8 +428,13 @@ static void avic_invalidate_logical_id_entry(struct kvm_vcpu *vcpu) > { > struct vcpu_svm *svm = to_svm(vcpu); > bool flat = svm->dfr_reg == APIC_DFR_FLAT; > - u32 *entry = avic_get_logical_id_entry(vcpu, svm->ldr_reg, flat); > + u32 *entry; > + > + /* Note: x2AVIC does not use logical APIC ID table */ > + if (apic_x2apic_mode(vcpu->arch.apic)) > + return; > > + entry = avic_get_logical_id_entry(vcpu, svm->ldr_reg, flat); > if (entry) > clear_bit(AVIC_LOGICAL_ID_ENTRY_VALID_BIT, (unsigned long *)entry); > } Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Best regards, Maxim Levitsky
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 5329b93dc4cd..4d7a8743196e 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -406,6 +406,10 @@ static int avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ldr) bool flat; u32 *entry, new_entry; + /* Note: x2AVIC does not use logical APIC ID table */ + if (apic_x2apic_mode(vcpu->arch.apic)) + return 0; + flat = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR) == APIC_DFR_FLAT; entry = avic_get_logical_id_entry(vcpu, ldr, flat); if (!entry) @@ -424,8 +428,13 @@ static void avic_invalidate_logical_id_entry(struct kvm_vcpu *vcpu) { struct vcpu_svm *svm = to_svm(vcpu); bool flat = svm->dfr_reg == APIC_DFR_FLAT; - u32 *entry = avic_get_logical_id_entry(vcpu, svm->ldr_reg, flat); + u32 *entry; + + /* Note: x2AVIC does not use logical APIC ID table */ + if (apic_x2apic_mode(vcpu->arch.apic)) + return; + entry = avic_get_logical_id_entry(vcpu, svm->ldr_reg, flat); if (entry) clear_bit(AVIC_LOGICAL_ID_ENTRY_VALID_BIT, (unsigned long *)entry); }
In X2APIC mode the Logical Destination Register is read-only, which provides a fixed mapping between the logical and physical APIC IDs. Therefore, there is no Logical APIC ID table in X2AVIC and the processor uses the X2APIC ID in the backing page to create a vCPU’s logical ID. Also, when x2AVIC is activated, a guest write to the x2APIC LDR register would result in #GP injection into the guest by the hardware. Therefore, add logic to check x2APIC mode before updating logical APIC ID table. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> --- arch/x86/kvm/svm/avic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)