diff mbox series

KVM: nVMX: clean up posted interrupt descriptor try_cmpxchg

Message ID 20220624154552.2736417-1-pbonzini@redhat.com (mailing list archive)
State New, archived
Headers show
Series KVM: nVMX: clean up posted interrupt descriptor try_cmpxchg | expand

Commit Message

Paolo Bonzini June 24, 2022, 3:45 p.m. UTC
Rely on try_cmpxchg64 for re-reading the PID on failure, using READ_ONCE
only right before the first iteration.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/kvm/vmx/posted_intr.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

Comments

Uros Bizjak June 25, 2022, 7:37 a.m. UTC | #1
On Fri, Jun 24, 2022 at 5:45 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> Rely on try_cmpxchg64 for re-reading the PID on failure, using READ_ONCE
> only right before the first iteration.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  arch/x86/kvm/vmx/posted_intr.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c
> index 73f60aa480fe..1b56c5e5c9fb 100644
> --- a/arch/x86/kvm/vmx/posted_intr.c
> +++ b/arch/x86/kvm/vmx/posted_intr.c
> @@ -34,7 +34,7 @@ static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
>         return &(to_vmx(vcpu)->pi_desc);
>  }
>
> -static int pi_try_set_control(struct pi_desc *pi_desc, u64 old, u64 new)
> +static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)
>  {
>         /*
>          * PID.ON can be set at any time by a different vCPU or by hardware,
> @@ -42,7 +42,7 @@ static int pi_try_set_control(struct pi_desc *pi_desc, u64 old, u64 new)
>          * update must be retried with a fresh snapshot an ON change causes
>          * the cmpxchg to fail.
>          */
> -       if (!try_cmpxchg64(&pi_desc->control, &old, new))
> +       if (!try_cmpxchg64(&pi_desc->control, pold, new))
>                 return -EBUSY;
>
>         return 0;
> @@ -96,8 +96,9 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
>         if (!x2apic_mode)
>                 dest = (dest << 8) & 0xFF00;
>
> +       old.control = READ_ONCE(pi_desc->control);
>         do {
> -               old.control = new.control = READ_ONCE(pi_desc->control);
> +               new.control = old.control;
>
>                 /*
>                  * Clear SN (as above) and refresh the destination APIC ID to
> @@ -111,7 +112,7 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
>                  * descriptor was modified on "put" to use the wakeup vector.
>                  */
>                 new.nv = POSTED_INTR_VECTOR;
> -       } while (pi_try_set_control(pi_desc, old.control, new.control));
> +       } while (pi_try_set_control(pi_desc, &old.control, new.control));
>
>         local_irq_restore(flags);
>
> @@ -156,12 +157,12 @@ static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
>
>         WARN(pi_desc->sn, "PI descriptor SN field set before blocking");
>
> +       old.control = READ_ONCE(pi_desc->control);
>         do {
> -               old.control = new.control = READ_ONCE(pi_desc->control);
> -
>                 /* set 'NV' to 'wakeup vector' */
> +               new.control = old.control;

This assignment should be above the comment, similar to vmx_vcpu_pi_load.

Uros.
>                 new.nv = POSTED_INTR_WAKEUP_VECTOR;
> -       } while (pi_try_set_control(pi_desc, old.control, new.control));
> +       } while (pi_try_set_control(pi_desc, &old.control, new.control));
>
>         /*
>          * Send a wakeup IPI to this CPU if an interrupt may have been posted
> --
> 2.31.1
>
diff mbox series

Patch

diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c
index 73f60aa480fe..1b56c5e5c9fb 100644
--- a/arch/x86/kvm/vmx/posted_intr.c
+++ b/arch/x86/kvm/vmx/posted_intr.c
@@ -34,7 +34,7 @@  static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
 	return &(to_vmx(vcpu)->pi_desc);
 }
 
-static int pi_try_set_control(struct pi_desc *pi_desc, u64 old, u64 new)
+static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)
 {
 	/*
 	 * PID.ON can be set at any time by a different vCPU or by hardware,
@@ -42,7 +42,7 @@  static int pi_try_set_control(struct pi_desc *pi_desc, u64 old, u64 new)
 	 * update must be retried with a fresh snapshot an ON change causes
 	 * the cmpxchg to fail.
 	 */
-	if (!try_cmpxchg64(&pi_desc->control, &old, new))
+	if (!try_cmpxchg64(&pi_desc->control, pold, new))
 		return -EBUSY;
 
 	return 0;
@@ -96,8 +96,9 @@  void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
 	if (!x2apic_mode)
 		dest = (dest << 8) & 0xFF00;
 
+	old.control = READ_ONCE(pi_desc->control);
 	do {
-		old.control = new.control = READ_ONCE(pi_desc->control);
+		new.control = old.control;
 
 		/*
 		 * Clear SN (as above) and refresh the destination APIC ID to
@@ -111,7 +112,7 @@  void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
 		 * descriptor was modified on "put" to use the wakeup vector.
 		 */
 		new.nv = POSTED_INTR_VECTOR;
-	} while (pi_try_set_control(pi_desc, old.control, new.control));
+	} while (pi_try_set_control(pi_desc, &old.control, new.control));
 
 	local_irq_restore(flags);
 
@@ -156,12 +157,12 @@  static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
 
 	WARN(pi_desc->sn, "PI descriptor SN field set before blocking");
 
+	old.control = READ_ONCE(pi_desc->control);
 	do {
-		old.control = new.control = READ_ONCE(pi_desc->control);
-
 		/* set 'NV' to 'wakeup vector' */
+		new.control = old.control;
 		new.nv = POSTED_INTR_WAKEUP_VECTOR;
-	} while (pi_try_set_control(pi_desc, old.control, new.control));
+	} while (pi_try_set_control(pi_desc, &old.control, new.control));
 
 	/*
 	 * Send a wakeup IPI to this CPU if an interrupt may have been posted