| Message ID | 20220629150625.238286-15-vkuznets@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: VMX: Support TscScaling and EnclsExitingBitmap with eVMCS + use vmcs_config for L1 VMX MSRs | expand |
On Wed, Jun 29, 2022 at 8:07 AM Vitaly Kuznetsov <vkuznets@redhat.com> wrote: > > VM_ENTRY_IA32E_MODE control is toggled dynamically by vmx_set_efer() > and setup_vmcs_config() doesn't check its existence. On the contrary, > nested_vmx_setup_ctls_msrs() doesn set it on x86_64. Add the missing > check and filter the bit out in vmx_vmentry_ctrl(). > > No (real) functional change intended as all existing CPUs supporting > long mode and VMX are supposed to have it. > > Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> > --- > arch/x86/kvm/vmx/vmx.c | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 83feb70d44a9..da8bbba38d0e 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -2610,6 +2610,9 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf, > _pin_based_exec_control &= ~PIN_BASED_POSTED_INTR; > > min = VM_ENTRY_LOAD_DEBUG_CONTROLS; > +#ifdef CONFIG_X86_64 > + min |= VM_ENTRY_IA32E_MODE; > +#endif > opt = VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | > VM_ENTRY_LOAD_IA32_PAT | > VM_ENTRY_LOAD_IA32_EFER | > @@ -4242,9 +4245,15 @@ static u32 vmx_vmentry_ctrl(void) > if (vmx_pt_mode_is_system()) > vmentry_ctrl &= ~(VM_ENTRY_PT_CONCEAL_PIP | > VM_ENTRY_LOAD_IA32_RTIT_CTL); > - /* Loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically */ > - return vmentry_ctrl & > - ~(VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VM_ENTRY_LOAD_IA32_EFER); > + /* > + * Loading of EFER, VM_ENTRY_IA32E_MODE, and PERF_GLOBAL_CTRL > + * are toggled dynamically. > + */ Nit: Previously, this could be read as "loading of (EFER and PERF_GLOBAL_CTRL)." Since "loading" doesn't apply to IA32e mode, you've lost "loading" of PERF_GLOBAL_CONTROL. Also, why drop the VM_ENTRY prefix from the MSRs and not from IA32e mode? Perhaps: /* * IA32e mode, and loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically. */ > + vmentry_ctrl &= ~(VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | > + VM_ENTRY_LOAD_IA32_EFER | > + VM_ENTRY_IA32E_MODE); > + > + return vmentry_ctrl; > } > > static u32 vmx_vmexit_ctrl(void) > -- > 2.35.3 > Reviewed-by: Jim Mattson <jmattson@google.com>
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 83feb70d44a9..da8bbba38d0e 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -2610,6 +2610,9 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf, _pin_based_exec_control &= ~PIN_BASED_POSTED_INTR; min = VM_ENTRY_LOAD_DEBUG_CONTROLS; +#ifdef CONFIG_X86_64 + min |= VM_ENTRY_IA32E_MODE; +#endif opt = VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_IA32_EFER | @@ -4242,9 +4245,15 @@ static u32 vmx_vmentry_ctrl(void) if (vmx_pt_mode_is_system()) vmentry_ctrl &= ~(VM_ENTRY_PT_CONCEAL_PIP | VM_ENTRY_LOAD_IA32_RTIT_CTL); - /* Loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically */ - return vmentry_ctrl & - ~(VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VM_ENTRY_LOAD_IA32_EFER); + /* + * Loading of EFER, VM_ENTRY_IA32E_MODE, and PERF_GLOBAL_CTRL + * are toggled dynamically. + */ + vmentry_ctrl &= ~(VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | + VM_ENTRY_LOAD_IA32_EFER | + VM_ENTRY_IA32E_MODE); + + return vmentry_ctrl; } static u32 vmx_vmexit_ctrl(void)
VM_ENTRY_IA32E_MODE control is toggled dynamically by vmx_set_efer() and setup_vmcs_config() doesn't check its existence. On the contrary, nested_vmx_setup_ctls_msrs() doesn set it on x86_64. Add the missing check and filter the bit out in vmx_vmentry_ctrl(). No (real) functional change intended as all existing CPUs supporting long mode and VMX are supposed to have it. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> --- arch/x86/kvm/vmx/vmx.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)