From patchwork Tue Aug 2 07:47:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 12934327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B35E5C19F29 for ; Tue, 2 Aug 2022 07:50:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236192AbiHBHu4 (ORCPT ); Tue, 2 Aug 2022 03:50:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236203AbiHBHuc (ORCPT ); Tue, 2 Aug 2022 03:50:32 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DD0925E5 for ; Tue, 2 Aug 2022 00:50:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659426615; x=1690962615; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7NLu5WePphsZ/nK7xHvWAbizNV4GW53sQRPvxgf3CyI=; b=PPItF3GaJmOidKUC2S1Rpx7ECOsad5dD444VjZLeXmXqdU5cao2XJk5g sHWhUU7bqSFSwec+YQbR8ENA1768Ufi5w+nl23OVeyJ4a2krZrhQ9cH9H H9mA+QkBBKGOCLJgXXNutFJ+2U8IHUduC2txadB/CRNY5Dt5YQrP0DIf8 hPWYBUy+WK3FTF8gTYo9Zjz5wiMcE6my1s6CBqp7cdmKhv8E5axfsb080 s2gSBSUvHpaaLvWkjGXX7LAtF/JOMhq/a8EJESgXt3Tl/yoOG6Yf5lpWm tVhOtsIvdMv4wQvM6Vb37MY493JQZrXS2h1jFoZ/venKp/8lBa9ZHhHOh A==; X-IronPort-AV: E=McAfee;i="6400,9594,10426"; a="272393172" X-IronPort-AV: E=Sophos;i="5.93,210,1654585200"; d="scan'208";a="272393172" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Aug 2022 00:50:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,210,1654585200"; d="scan'208";a="630604362" Received: from lxy-dell.sh.intel.com ([10.239.48.38]) by orsmga008.jf.intel.com with ESMTP; 02 Aug 2022 00:50:08 -0700 From: Xiaoyao Li To: Paolo Bonzini , Isaku Yamahata , Gerd Hoffmann , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , =?utf-8?q?Phi?= =?utf-8?q?lippe_Mathieu-Daud=C3=A9?= , Richard Henderson , "Michael S . Tsirkin" , Marcel Apfelbaum , Cornelia Huck , Marcelo Tosatti , Laszlo Ersek , Eric Blake Cc: Connor Kuehl , erdemaktas@google.com, kvm@vger.kernel.org, qemu-devel@nongnu.org, seanjc@google.com, xiaoyao.li@intel.com Subject: [PATCH v1 32/40] i386/tdx: Disable PIC for TDX VMs Date: Tue, 2 Aug 2022 15:47:42 +0800 Message-Id: <20220802074750.2581308-33-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220802074750.2581308-1-xiaoyao.li@intel.com> References: <20220802074750.2581308-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Legacy PIC (8259) cannot be supported for TDX VMs since TDX module doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Hence disable PIC for TDX VMs and error out if user wants PIC. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index 70c56b7ba32c..2f317a6bb55b 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -668,6 +668,13 @@ int tdx_kvm_init(MachineState *ms, Error **errp) return -EINVAL; } + if (x86ms->pic == ON_OFF_AUTO_AUTO) { + x86ms->pic = ON_OFF_AUTO_OFF; + } else if (x86ms->pic == ON_OFF_AUTO_ON) { + error_setg(errp, "TDX VM doesn't support PIC"); + return -EINVAL; + } + if (!tdx_caps) { get_tdx_capabilities(); }