Message ID | 20220830133737.1539624-3-vkuznets@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: VMX: Support updated eVMCSv1 revision + use vmcs_config for L1 VMX MSRs | expand |
On Tue, Aug 30, 2022 at 03:37:06PM +0200, Vitaly Kuznetsov wrote: > Updated Hyper-V Enlightened VMCS specification lists several new > fields for the following features: > > - PerfGlobalCtrl > - EnclsExitingBitmap > - Tsc Scaling > - GuestLbrCtl > - CET > - SSP > > Update the definition. > > Note, the updated spec also provides an additional CPUID feature flag, > CPUIDD.0x4000000A.EBX BIT(0), for PerfGlobalCtrl to workaround a Windows > 11 quirk. Despite what the TLFS says: > > Indicates support for the GuestPerfGlobalCtrl and HostPerfGlobalCtrl > fields in the enlightened VMCS. > > guests can safely use the fields if they are enumerated in the > architectural VMX MSRs. I.e. KVM-on-HyperV doesn't need to check the > CPUID bit, but KVM-as-HyperV must ensure the bit is set if PerfGlobalCtrl > fields are exposed to L1. > > https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/tlfs/tlfs > > Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> > [sean: tweak CPUID name to make it PerfGlobalCtrl only] > Signed-off-by: Sean Christopherson <seanjc@google.com> Acked-by: Wei Liu <wei.liu@kernel.org>
diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h index 6f0acc45e67a..3089ec352743 100644 --- a/arch/x86/include/asm/hyperv-tlfs.h +++ b/arch/x86/include/asm/hyperv-tlfs.h @@ -138,6 +138,9 @@ #define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18) #define HV_X64_NESTED_MSR_BITMAP BIT(19) +/* Nested features #2. These are HYPERV_CPUID_NESTED_FEATURES.EBX bits. */ +#define HV_X64_NESTED_EVMCS1_PERF_GLOBAL_CTRL BIT(0) + /* * This is specific to AMD and specifies that enlightened TLB flush is * supported. If guest opts in to this feature, ASID invalidations only @@ -559,9 +562,20 @@ struct hv_enlightened_vmcs { u64 partition_assist_page; u64 padding64_4[4]; u64 guest_bndcfgs; - u64 padding64_5[7]; + u64 guest_ia32_perf_global_ctrl; + u64 guest_ia32_s_cet; + u64 guest_ssp; + u64 guest_ia32_int_ssp_table_addr; + u64 guest_ia32_lbr_ctl; + u64 padding64_5[2]; u64 xss_exit_bitmap; - u64 padding64_6[7]; + u64 encls_exiting_bitmap; + u64 host_ia32_perf_global_ctrl; + u64 tsc_multiplier; + u64 host_ia32_s_cet; + u64 host_ssp; + u64 host_ia32_int_ssp_table_addr; + u64 padding64_6; } __packed; #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0