| Message ID | 20220830225210.2381310-2-jmattson@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] KVM: x86: Insert "AMD" in KVM_X86_FEATURE_PSFD | expand |
On Tue, Aug 30, 2022, Jim Mattson wrote: > Intel enumerates support for PSFD in CPUID.(EAX=7,ECX=2):EDX.PSFD[bit > 0]. Report support for this feature in KVM if it is available on the > host. > > Presumably, this feature bit, like its AMD counterpart, is not welcome > in cpufeatures.h, so add a local definition of this feature in KVM. > > Signed-off-by: Jim Mattson <jmattson@google.com> > --- > arch/x86/kvm/cpuid.c | 23 +++++++++++++++++------ > 1 file changed, 17 insertions(+), 6 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 07be45c5bb93..b5af9e451bef 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -62,6 +62,7 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted) > * This one is tied to SSB in the user API, and not > * visible in /proc/cpuinfo. > */ > +#define KVM_X86_FEATURE_PSFD 0 /* Predictive Store Forwarding Disable */ I believe we can use "enum kvm_only_cpuid_leafs" to handle this. E.g. enum kvm_only_cpuid_leafs { CPUID_12_EAX = NCAPINTS, CPUID_7_2_EDX, NR_KVM_CPU_CAPS, NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, }; then the intended use of KVM_X86_FEATURE_* #define KVM_X86_FEATURE_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0) I _think_ we can then define an arbitrary word for X86_FEATURE_PSFD, e.g. #define X86_FEATURE_PSFD (NKVMCAPINTS*32+0) and then wire up the translation: static __always_inline u32 __feature_translate(int x86_feature) { if (x86_feature == X86_FEATURE_SGX1) return KVM_X86_FEATURE_SGX1; else if (x86_feature == X86_FEATURE_SGX2) return KVM_X86_FEATURE_SGX2; else if (x86_feature == X86_FEATURE_PSFD) return KVM_X86_FEATURE_PSFD; return x86_feature; } I believe/hope that allows us to use at least cpuid_entry_override(). Open coding masking of specific registers was a mess that I don't want to repeat.
On Tue, Aug 30, 2022 at 4:39 PM Sean Christopherson <seanjc@google.com> wrote: > > On Tue, Aug 30, 2022, Jim Mattson wrote: > > Intel enumerates support for PSFD in CPUID.(EAX=7,ECX=2):EDX.PSFD[bit > > 0]. Report support for this feature in KVM if it is available on the > > host. > > > > Presumably, this feature bit, like its AMD counterpart, is not welcome > > in cpufeatures.h, so add a local definition of this feature in KVM. > > > > Signed-off-by: Jim Mattson <jmattson@google.com> > > --- > > arch/x86/kvm/cpuid.c | 23 +++++++++++++++++------ > > 1 file changed, 17 insertions(+), 6 deletions(-) > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > > index 07be45c5bb93..b5af9e451bef 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -62,6 +62,7 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted) > > * This one is tied to SSB in the user API, and not > > * visible in /proc/cpuinfo. > > */ > > +#define KVM_X86_FEATURE_PSFD 0 /* Predictive Store Forwarding Disable */ > > I believe we can use "enum kvm_only_cpuid_leafs" to handle this. E.g. > > enum kvm_only_cpuid_leafs { > CPUID_12_EAX = NCAPINTS, > CPUID_7_2_EDX, > NR_KVM_CPU_CAPS, > > NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, > }; > > then the intended use of KVM_X86_FEATURE_* > > #define KVM_X86_FEATURE_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0) > > I _think_ we can then define an arbitrary word for X86_FEATURE_PSFD, e.g. > > #define X86_FEATURE_PSFD (NKVMCAPINTS*32+0) We may run afoul of reverse_cpuid_check(), depending on usage. > and then wire up the translation: > > static __always_inline u32 __feature_translate(int x86_feature) > { > if (x86_feature == X86_FEATURE_SGX1) > return KVM_X86_FEATURE_SGX1; > else if (x86_feature == X86_FEATURE_SGX2) > return KVM_X86_FEATURE_SGX2; > else if (x86_feature == X86_FEATURE_PSFD) > return KVM_X86_FEATURE_PSFD; > > return x86_feature; > } > > I believe/hope that allows us to use at least cpuid_entry_override(). Open coding > masking of specific registers was a mess that I don't want to repeat. Maybe we can plead for a bit in word 11?
On Tue, Aug 30, 2022, Jim Mattson wrote: > On Tue, Aug 30, 2022 at 4:39 PM Sean Christopherson <seanjc@google.com> wrote: > > > > On Tue, Aug 30, 2022, Jim Mattson wrote: > > > Intel enumerates support for PSFD in CPUID.(EAX=7,ECX=2):EDX.PSFD[bit > > > 0]. Report support for this feature in KVM if it is available on the > > > host. > > > > > > Presumably, this feature bit, like its AMD counterpart, is not welcome > > > in cpufeatures.h, so add a local definition of this feature in KVM. > > > > > > Signed-off-by: Jim Mattson <jmattson@google.com> > > > --- > > > arch/x86/kvm/cpuid.c | 23 +++++++++++++++++------ > > > 1 file changed, 17 insertions(+), 6 deletions(-) > > > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > > > index 07be45c5bb93..b5af9e451bef 100644 > > > --- a/arch/x86/kvm/cpuid.c > > > +++ b/arch/x86/kvm/cpuid.c > > > @@ -62,6 +62,7 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted) > > > * This one is tied to SSB in the user API, and not > > > * visible in /proc/cpuinfo. > > > */ > > > +#define KVM_X86_FEATURE_PSFD 0 /* Predictive Store Forwarding Disable */ > > > > I believe we can use "enum kvm_only_cpuid_leafs" to handle this. E.g. > > > > enum kvm_only_cpuid_leafs { > > CPUID_12_EAX = NCAPINTS, > > CPUID_7_2_EDX, > > NR_KVM_CPU_CAPS, > > > > NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, > > }; > > > > then the intended use of KVM_X86_FEATURE_* > > > > #define KVM_X86_FEATURE_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0) > > > > I _think_ we can then define an arbitrary word for X86_FEATURE_PSFD, e.g. > > > > #define X86_FEATURE_PSFD (NKVMCAPINTS*32+0) > > We may run afoul of reverse_cpuid_check(), depending on usage. Oh, yeah, an entry in reverse_cpuid[] would also be needed. For posterity since PSFD doesn't need a KVM-only entry[*]... [*] https://lore.kernel.org/all/Y0CrER%2FyiHheWiZw@google.com
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 07be45c5bb93..b5af9e451bef 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -62,6 +62,7 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted) * This one is tied to SSB in the user API, and not * visible in /proc/cpuinfo. */ +#define KVM_X86_FEATURE_PSFD 0 /* Predictive Store Forwarding Disable */ #define KVM_X86_FEATURE_AMD_PSFD (13*32+28) /* Predictive Store Forwarding Disable */ #define F feature_bit @@ -677,9 +678,9 @@ void kvm_set_cpu_caps(void) ); /* - * AMD has separate bits for each SPEC_CTRL bit. - * arch/x86/kernel/cpu/bugs.c is kind enough to - * record that in cpufeatures so use them. + * AMD has separate bits for each SPEC_CTRL bit. Except for + * PSFD, arch/x86/kernel/cpu/bugs.c is kind enough to record + * that in cpufeatures so use them. */ if (boot_cpu_has(X86_FEATURE_IBPB)) kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB); @@ -880,13 +881,13 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) break; /* function 7 has additional index. */ case 7: - entry->eax = min(entry->eax, 1u); + /* KVM only supports leaf 7 indices 0 through 2. */ + max_idx = entry->eax = min(entry->eax, 2u); cpuid_entry_override(entry, CPUID_7_0_EBX); cpuid_entry_override(entry, CPUID_7_ECX); cpuid_entry_override(entry, CPUID_7_EDX); - /* KVM only supports 0x7.0 and 0x7.1, capped above via min(). */ - if (entry->eax == 1) { + if (max_idx >= 1) { entry = do_host_cpuid(array, function, 1); if (!entry) goto out; @@ -896,6 +897,16 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) entry->ecx = 0; entry->edx = 0; } + if (max_idx >= 2) { + entry = do_host_cpuid(array, function, 2); + if (!entry) + goto out; + + entry->eax = 0; + entry->ebx = 0; + entry->ecx = 0; + entry->edx &= BIT(KVM_X86_FEATURE_PSFD); + } break; case 9: break;
Intel enumerates support for PSFD in CPUID.(EAX=7,ECX=2):EDX.PSFD[bit 0]. Report support for this feature in KVM if it is available on the host. Presumably, this feature bit, like its AMD counterpart, is not welcome in cpufeatures.h, so add a local definition of this feature in KVM. Signed-off-by: Jim Mattson <jmattson@google.com> --- arch/x86/kvm/cpuid.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-)