| Message ID | 20220831162124.947028-7-aaronlewis@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce and test masked events | expand |
On Wed, Aug 31, 2022 at 9:21 AM Aaron Lewis <aaronlewis@google.com> wrote: > > Test that masked events are not using invalid bits, and if they are, > ensure the pmu event filter is not accepted by KVM_SET_PMU_EVENT_FILTER. > The only valid bits that can be used for masked events are set when > using KVM_PMU_EVENT_ENCODE_MASKED_EVENT() with one exception: If any > of the high bits (11:8) of the event select are set when using Intel, > the PMU event filter will fail. > > Also, because validation was not being done prior to the introduction > of masked events, only expect validation to fail when masked events > are used. E.g. in the first test a filter event with all it's bits set Nit: its > is accepted by KVM_SET_PMU_EVENT_FILTER when flags = 0. > > Signed-off-by: Aaron Lewis <aaronlewis@google.com> > --- > .../kvm/x86_64/pmu_event_filter_test.c | 35 +++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c > index bd7054a53981..73a81262ca72 100644 > --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c > +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c > @@ -442,6 +442,39 @@ static bool use_amd_pmu(void) > is_zen3(entry->eax)); > } > > +static int run_filter_test(struct kvm_vcpu *vcpu, const uint64_t *events, > + int nevents, uint32_t flags) > +{ > + struct kvm_pmu_event_filter *f; > + int r; > + > + f = create_pmu_event_filter(events, nevents, KVM_PMU_EVENT_ALLOW, flags); > + r = __vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); > + free(f); > + > + return r; > +} > + > +static void test_filter_ioctl(struct kvm_vcpu *vcpu) > +{ > + uint64_t e = ~0ul; > + int r; > + > + /* > + * Unfortunately having invalid bits set in event data is expected to > + * pass when flags == 0 (bits other than eventsel+umask). > + */ > + r = run_filter_test(vcpu, &e, 1, 0); > + TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); > + > + r = run_filter_test(vcpu, &e, 1, KVM_PMU_EVENT_FLAG_MASKED_EVENTS); Before using KVM_PMU_EVENT_FLAG_MASKED_EVENTS, we need to test for KVM_CAP_PMU_EVENT_MASKED_EVENTS.
diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index bd7054a53981..73a81262ca72 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -442,6 +442,39 @@ static bool use_amd_pmu(void) is_zen3(entry->eax)); } +static int run_filter_test(struct kvm_vcpu *vcpu, const uint64_t *events, + int nevents, uint32_t flags) +{ + struct kvm_pmu_event_filter *f; + int r; + + f = create_pmu_event_filter(events, nevents, KVM_PMU_EVENT_ALLOW, flags); + r = __vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); + free(f); + + return r; +} + +static void test_filter_ioctl(struct kvm_vcpu *vcpu) +{ + uint64_t e = ~0ul; + int r; + + /* + * Unfortunately having invalid bits set in event data is expected to + * pass when flags == 0 (bits other than eventsel+umask). + */ + r = run_filter_test(vcpu, &e, 1, 0); + TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); + + r = run_filter_test(vcpu, &e, 1, KVM_PMU_EVENT_FLAG_MASKED_EVENTS); + TEST_ASSERT(r != 0, "Invalid PMU Event Filter is expected to fail"); + + e = KVM_PMU_EVENT_ENCODE_MASKED_ENTRY(0xff, 0xff, 0xff, 0xf); + r = run_filter_test(vcpu, &e, 1, KVM_PMU_EVENT_FLAG_MASKED_EVENTS); + TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); +} + int main(int argc, char *argv[]) { void (*guest_code)(void); @@ -472,6 +505,8 @@ int main(int argc, char *argv[]) test_not_member_deny_list(vcpu); test_not_member_allow_list(vcpu); + test_filter_ioctl(vcpu); + kvm_vm_free(vm); test_pmu_config_disable(guest_code);
Test that masked events are not using invalid bits, and if they are, ensure the pmu event filter is not accepted by KVM_SET_PMU_EVENT_FILTER. The only valid bits that can be used for masked events are set when using KVM_PMU_EVENT_ENCODE_MASKED_EVENT() with one exception: If any of the high bits (11:8) of the event select are set when using Intel, the PMU event filter will fail. Also, because validation was not being done prior to the introduction of masked events, only expect validation to fail when masked events are used. E.g. in the first test a filter event with all it's bits set is accepted by KVM_SET_PMU_EVENT_FILTER when flags = 0. Signed-off-by: Aaron Lewis <aaronlewis@google.com> --- .../kvm/x86_64/pmu_event_filter_test.c | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+)