Message ID | 20220831211810.2575536-1-jmattson@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] x86/cpufeatures: Add macros for Intel's new fast rep string features | expand |
On Wed, Aug 31, 2022, Jim Mattson wrote: > KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits Why not provide the KVM support in the same patch/series? > are already cached in word 12. Give the bits X86_FEATURE names, so > that they can be easily referenced. Hide these bits from > /proc/cpuinfo, since the host kernel makes no use of them at present. > > Signed-off-by: Jim Mattson <jmattson@google.com> > --- > v1 -> v2: Hide from /proc/cpuinfo [Dave Hansen] > > arch/x86/include/asm/cpufeatures.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index ef4775c6db01..454f0faa8e90 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -308,6 +308,9 @@ > /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ > #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ > #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ > +#define X86_FEATURE_FZRM (12*32+10) /* "" Fast zero-length REP MOVSB */ > +#define X86_FEATURE_FSRS (12*32+11) /* "" Fast short REP STOSB */ > +#define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ > > /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ > #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ > -- > 2.37.2.672.g94769d06f0-goog >
On Thu, Sep 1, 2022 at 9:36 AM Sean Christopherson <seanjc@google.com> wrote: > > On Wed, Aug 31, 2022, Jim Mattson wrote: > > KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits > > Why not provide the KVM support in the same patch/series? > Coming up.
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ef4775c6db01..454f0faa8e90 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -308,6 +308,9 @@ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ +#define X86_FEATURE_FZRM (12*32+10) /* "" Fast zero-length REP MOVSB */ +#define X86_FEATURE_FSRS (12*32+11) /* "" Fast short REP STOSB */ +#define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits are already cached in word 12. Give the bits X86_FEATURE names, so that they can be easily referenced. Hide these bits from /proc/cpuinfo, since the host kernel makes no use of them at present. Signed-off-by: Jim Mattson <jmattson@google.com> --- v1 -> v2: Hide from /proc/cpuinfo [Dave Hansen] arch/x86/include/asm/cpufeatures.h | 3 +++ 1 file changed, 3 insertions(+)