| Message ID | 20220920205922.1564814-4-jmattson@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: EFER.LMSLE cleanup | expand |
On Tue, Sep 20, 2022, Jim Mattson wrote: > CPUID.80000008H:EDX.EferLmsleUnsupported[bit 20] indicates that > IA32_EFER.LMSLE[bit 13] is unsupported and must be zero. > > KVM doesn't support "Long Mode Segment Limit Enable," even if the > underlying physical processor does, so set that bit in the guest CPUID > table returned by KVM_GET_SUPPORTED_CPUID. > > Signed-off-by: Jim Mattson <jmattson@google.com> > --- > arch/x86/kvm/svm/svm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index 3af360fe21e6..0bf6ac51f097 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -4945,6 +4945,7 @@ static __init void svm_set_cpu_caps(void) > if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) || > boot_cpu_has(X86_FEATURE_AMD_SSBD)) > kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD); > + kvm_cpu_cap_set(X86_FEATURE_NO_LMSLE); This can go in common x86 code, e.g. if someone wants to run an AMD VM on Intel hardware. Side topic, in the context of this series, the below diff highlights how silly it is for PSFD to be banished from cpufeatures.h. While we have Boris's attention (and ACK!), can you tack on a patch to move drop KVM_X86_FEATURE_PSFD and move the bit to cpufeatures.h where it belongs? --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -696,6 +696,7 @@ void kvm_set_cpu_caps(void) F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) | __feature_bit(KVM_X86_FEATURE_PSFD) ); + kvm_cpu_cap_set(X86_FEATURE_NO_LMSLE); /* * AMD has separate bits for each SPEC_CTRL bit.
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 3af360fe21e6..0bf6ac51f097 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -4945,6 +4945,7 @@ static __init void svm_set_cpu_caps(void) if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) || boot_cpu_has(X86_FEATURE_AMD_SSBD)) kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD); + kvm_cpu_cap_set(X86_FEATURE_NO_LMSLE); /* AMD PMU PERFCTR_CORE CPUID */ if (enable_pmu && boot_cpu_has(X86_FEATURE_PERFCTR_CORE))
CPUID.80000008H:EDX.EferLmsleUnsupported[bit 20] indicates that IA32_EFER.LMSLE[bit 13] is unsupported and must be zero. KVM doesn't support "Long Mode Segment Limit Enable," even if the underlying physical processor does, so set that bit in the guest CPUID table returned by KVM_GET_SUPPORTED_CPUID. Signed-off-by: Jim Mattson <jmattson@google.com> --- arch/x86/kvm/svm/svm.c | 1 + 1 file changed, 1 insertion(+)