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KVM: x86: Advertise that the SMM_CTL MSR is not supported

Message ID 20221007221644.138355-1-jmattson@google.com (mailing list archive)
State New, archived
Headers show
Series KVM: x86: Advertise that the SMM_CTL MSR is not supported | expand

Commit Message

Jim Mattson Oct. 7, 2022, 10:16 p.m. UTC
CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
is not supported. This defeature can be advertised by
KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
enumerates it.

Signed-off-by: Jim Mattson <jmattson@google.com>
---
 arch/x86/kvm/cpuid.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Sean Christopherson Oct. 7, 2022, 10:27 p.m. UTC | #1
On Fri, Oct 07, 2022, Jim Mattson wrote:
> CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
> is not supported. This defeature can be advertised by
> KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
> enumerates it.

Might be worth noting that KVM will only enumerate the bit if the host happens to
have a max extend leaf > 80000021.
> 
> Signed-off-by: Jim Mattson <jmattson@google.com>
> ---
>  arch/x86/kvm/cpuid.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 2796dde06302..b748fac2ae37 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1199,8 +1199,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>  		 * Other defined bits are for MSRs that KVM does not expose:
>  		 *   EAX      3      SPCL, SMM page configuration lock
>  		 *   EAX      13     PCMSR, Prefetch control MSR
> +		 *
> +		 * KVM doesn't support SMM_CTL.
> +		 *   EAX       9     SMM_CTL MSR is not supported
>  		 */
>  		entry->eax &= BIT(0) | BIT(2) | BIT(6);

I don't suppose I can bribe you to add a kvm_only_cpuid_leafs entry for these? :-)

> +		entry->eax |= BIT(9);
>  		if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
>  			entry->eax |= BIT(2);
>  		if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
> -- 
> 2.38.0.rc1.362.ged0d419d3c-goog
>
Sean Christopherson Dec. 1, 2022, 12:08 a.m. UTC | #2
On Fri, Oct 07, 2022, Sean Christopherson wrote:
> On Fri, Oct 07, 2022, Jim Mattson wrote:
> > CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
> > is not supported. This defeature can be advertised by
> > KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
> > enumerates it.
> 
> Might be worth noting that KVM will only enumerate the bit if the host happens to
> have a max extend leaf > 80000021.
> > 
> > Signed-off-by: Jim Mattson <jmattson@google.com>
> > ---
> >  arch/x86/kvm/cpuid.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 2796dde06302..b748fac2ae37 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -1199,8 +1199,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
> >  		 * Other defined bits are for MSRs that KVM does not expose:
> >  		 *   EAX      3      SPCL, SMM page configuration lock
> >  		 *   EAX      13     PCMSR, Prefetch control MSR
> > +		 *
> > +		 * KVM doesn't support SMM_CTL.
> > +		 *   EAX       9     SMM_CTL MSR is not supported
> >  		 */
> >  		entry->eax &= BIT(0) | BIT(2) | BIT(6);
> 
> I don't suppose I can bribe you to add a kvm_only_cpuid_leafs entry for these? :-)

Ha!  Someone else must have heard me whining :-)

https://lore.kernel.org/all/20221129235816.188737-5-kim.phillips@amd.com
Paolo Bonzini Dec. 2, 2022, 6:45 p.m. UTC | #3
On 10/8/22 00:27, Sean Christopherson wrote:
>> CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
>> is not supported. This defeature can be advertised by
>> KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
>> enumerates it.
> Might be worth noting that KVM will only enumerate the bit if the host happens to
> have a max extend leaf > 80000021.

Actually 0x8000001d, because 0x80000021 is a synthetic leaf (the only 
one of its kind).  Unfortunately we cannot synthesize 0x80000021 
unconditionally due to a preexisting bug in QEMU. :(

Paolo
Paolo Bonzini Dec. 2, 2022, 6:50 p.m. UTC | #4
On 10/8/22 00:16, Jim Mattson wrote:
> CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
> is not supported. This defeature can be advertised by
> KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
> enumerates it.
> 
> Signed-off-by: Jim Mattson <jmattson@google.com>
> ---
>   arch/x86/kvm/cpuid.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 2796dde06302..b748fac2ae37 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1199,8 +1199,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>   		 * Other defined bits are for MSRs that KVM does not expose:
>   		 *   EAX      3      SPCL, SMM page configuration lock
>   		 *   EAX      13     PCMSR, Prefetch control MSR
> +		 *
> +		 * KVM doesn't support SMM_CTL.
> +		 *   EAX       9     SMM_CTL MSR is not supported
>   		 */
>   		entry->eax &= BIT(0) | BIT(2) | BIT(6);
> +		entry->eax |= BIT(9);
>   		if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
>   			entry->eax |= BIT(2);
>   		if (!static_cpu_has_bug(X86_BUG_NULL_SEG))

Queued, thanks.  Negative features suck, though.

Paolo
Sean Christopherson Dec. 2, 2022, 6:58 p.m. UTC | #5
On Fri, Dec 02, 2022, Paolo Bonzini wrote:
> On 10/8/22 00:16, Jim Mattson wrote:
> > CPUID.80000021H:EAX[bit 9] indicates that the SMM_CTL MSR (0xc0010116)
> > is not supported. This defeature can be advertised by
> > KVM_GET_SUPPORTED_CPUID regardless of whether or not the host
> > enumerates it.
> > 
> > Signed-off-by: Jim Mattson <jmattson@google.com>
> > ---
> >   arch/x86/kvm/cpuid.c | 4 ++++
> >   1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 2796dde06302..b748fac2ae37 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -1199,8 +1199,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
> >   		 * Other defined bits are for MSRs that KVM does not expose:
> >   		 *   EAX      3      SPCL, SMM page configuration lock
> >   		 *   EAX      13     PCMSR, Prefetch control MSR
> > +		 *
> > +		 * KVM doesn't support SMM_CTL.
> > +		 *   EAX       9     SMM_CTL MSR is not supported
> >   		 */
> >   		entry->eax &= BIT(0) | BIT(2) | BIT(6);
> > +		entry->eax |= BIT(9);
> >   		if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
> >   			entry->eax |= BIT(2);
> >   		if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
> 
> Queued, thanks.  Negative features suck, though.

LOL, you and Jim should start a club, Jim's had a few good rants on negative
features :-)
diff mbox series

Patch

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 2796dde06302..b748fac2ae37 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -1199,8 +1199,12 @@  static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
 		 * Other defined bits are for MSRs that KVM does not expose:
 		 *   EAX      3      SPCL, SMM page configuration lock
 		 *   EAX      13     PCMSR, Prefetch control MSR
+		 *
+		 * KVM doesn't support SMM_CTL.
+		 *   EAX       9     SMM_CTL MSR is not supported
 		 */
 		entry->eax &= BIT(0) | BIT(2) | BIT(6);
+		entry->eax |= BIT(9);
 		if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
 			entry->eax |= BIT(2);
 		if (!static_cpu_has_bug(X86_BUG_NULL_SEG))