| Message ID | 20221112081714.2169495-7-ricarkol@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Eager huge-page splitting for dirty-logging | expand |
On Sat, Nov 12, 2022 at 08:17:08AM +0000, Ricardo Koller wrote: > Breaking a huge-page block PTE into an equivalent table of smaller PTEs > does not require using break-before-make (BBM) when FEAT_BBM level 2 is > implemented. Add the respective check for eager page splitting and avoid > using BBM. > > Also take care of possible Conflict aborts. According to the rules > specified in the Arm ARM (DDI 0487H.a) section "Support levels for changing > block size" D5.10.1, this can result in a Conflict abort. So, handle it by > clearing all VM TLB entries. > > Signed-off-by: Ricardo Koller <ricarkol@google.com> I'd suggest adding the TLB conflict abort handler as a separate commit prior to actually relaxing break-before-make requirements. > --- > arch/arm64/include/asm/esr.h | 1 + > arch/arm64/include/asm/kvm_arm.h | 1 + > arch/arm64/kvm/hyp/pgtable.c | 10 +++++++++- > arch/arm64/kvm/mmu.c | 6 ++++++ > 4 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index 15b34fbfca66..6f5b976396e7 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -114,6 +114,7 @@ > #define ESR_ELx_FSC_ACCESS (0x08) > #define ESR_ELx_FSC_FAULT (0x04) > #define ESR_ELx_FSC_PERM (0x0C) > +#define ESR_ELx_FSC_CONFLICT (0x30) > > /* ISS field definitions for Data Aborts */ > #define ESR_ELx_ISV_SHIFT (24) > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index 0df3fc3a0173..58e7cbe3c250 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -333,6 +333,7 @@ > #define FSC_SECC_TTW1 (0x1d) > #define FSC_SECC_TTW2 (0x1e) > #define FSC_SECC_TTW3 (0x1f) > +#define FSC_CONFLICT ESR_ELx_FSC_CONFLICT > > /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ > #define HPFAR_MASK (~UL(0xf)) > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > index 9c42eff6d42e..36b81df5687e 100644 > --- a/arch/arm64/kvm/hyp/pgtable.c > +++ b/arch/arm64/kvm/hyp/pgtable.c > @@ -1267,6 +1267,11 @@ static int stage2_create_removed(kvm_pte_t *ptep, u64 phys, u32 level, > return __kvm_pgtable_visit(&data, mm_ops, ptep, level); > } > > +static bool stage2_has_bbm_level2(void) > +{ > + return cpus_have_const_cap(ARM64_HAS_STAGE2_BBM2); > +} > + > struct stage2_split_data { > struct kvm_s2_mmu *mmu; > void *memcache; > @@ -1308,7 +1313,10 @@ static int stage2_split_walker(const struct kvm_pgtable_visit_ctx *ctx, > */ > WARN_ON(stage2_create_removed(&new, phys, level, attr, mc, mm_ops)); > > - stage2_put_pte(ctx, data->mmu, mm_ops); > + if (stage2_has_bbm_level2()) > + mm_ops->put_page(ctx->ptep); > + else > + stage2_put_pte(ctx, data->mmu, mm_ops); > > /* > * Note, the contents of the page table are guaranteed to be made > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index 8f26c65693a9..318f7b0aa20b 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -1481,6 +1481,12 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu) > return 1; > } > > + /* Conflict abort? */ > + if (fault_status == FSC_CONFLICT) { > + kvm_flush_remote_tlbs(vcpu->kvm); You don't need to perfom a broadcasted invalidation in this case. A local invalidation using the guest's VMID should suffice. -- Thanks, Oliver
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 15b34fbfca66..6f5b976396e7 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -114,6 +114,7 @@ #define ESR_ELx_FSC_ACCESS (0x08) #define ESR_ELx_FSC_FAULT (0x04) #define ESR_ELx_FSC_PERM (0x0C) +#define ESR_ELx_FSC_CONFLICT (0x30) /* ISS field definitions for Data Aborts */ #define ESR_ELx_ISV_SHIFT (24) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 0df3fc3a0173..58e7cbe3c250 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -333,6 +333,7 @@ #define FSC_SECC_TTW1 (0x1d) #define FSC_SECC_TTW2 (0x1e) #define FSC_SECC_TTW3 (0x1f) +#define FSC_CONFLICT ESR_ELx_FSC_CONFLICT /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ #define HPFAR_MASK (~UL(0xf)) diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index 9c42eff6d42e..36b81df5687e 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -1267,6 +1267,11 @@ static int stage2_create_removed(kvm_pte_t *ptep, u64 phys, u32 level, return __kvm_pgtable_visit(&data, mm_ops, ptep, level); } +static bool stage2_has_bbm_level2(void) +{ + return cpus_have_const_cap(ARM64_HAS_STAGE2_BBM2); +} + struct stage2_split_data { struct kvm_s2_mmu *mmu; void *memcache; @@ -1308,7 +1313,10 @@ static int stage2_split_walker(const struct kvm_pgtable_visit_ctx *ctx, */ WARN_ON(stage2_create_removed(&new, phys, level, attr, mc, mm_ops)); - stage2_put_pte(ctx, data->mmu, mm_ops); + if (stage2_has_bbm_level2()) + mm_ops->put_page(ctx->ptep); + else + stage2_put_pte(ctx, data->mmu, mm_ops); /* * Note, the contents of the page table are guaranteed to be made diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c index 8f26c65693a9..318f7b0aa20b 100644 --- a/arch/arm64/kvm/mmu.c +++ b/arch/arm64/kvm/mmu.c @@ -1481,6 +1481,12 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu) return 1; } + /* Conflict abort? */ + if (fault_status == FSC_CONFLICT) { + kvm_flush_remote_tlbs(vcpu->kvm); + return 1; + } + trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_esr(vcpu), kvm_vcpu_get_hfar(vcpu), fault_ipa);
Breaking a huge-page block PTE into an equivalent table of smaller PTEs does not require using break-before-make (BBM) when FEAT_BBM level 2 is implemented. Add the respective check for eager page splitting and avoid using BBM. Also take care of possible Conflict aborts. According to the rules specified in the Arm ARM (DDI 0487H.a) section "Support levels for changing block size" D5.10.1, this can result in a Conflict abort. So, handle it by clearing all VM TLB entries. Signed-off-by: Ricardo Koller <ricarkol@google.com> --- arch/arm64/include/asm/esr.h | 1 + arch/arm64/include/asm/kvm_arm.h | 1 + arch/arm64/kvm/hyp/pgtable.c | 10 +++++++++- arch/arm64/kvm/mmu.c | 6 ++++++ 4 files changed, 17 insertions(+), 1 deletion(-)