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Peter Anvin" , Ingo Molnar , Joao Martins , Jonathan Corbet , "Konrad Rzeszutek Wilk" , Paolo Bonzini , Sean Christopherson , Thomas Gleixner , David Woodhouse , Greg Kroah-Hartman , Juergen Gross , Peter Zijlstra , Tony Luck , Tom Lendacky , Alexey Kardashevskiy , , , Subject: [PATCH v4 1/7] x86/cpu: Define a scattered No Nested Data Breakpoints feature bit Date: Wed, 30 Nov 2022 19:49:57 -0600 Message-ID: <20221201015003.295769-2-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221201015003.295769-1-kim.phillips@amd.com> References: <20221201015003.295769-1-kim.phillips@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000EE3C:EE_|CH3PR12MB8186:EE_ X-MS-Office365-Filtering-Correlation-Id: f5fae657-f354-467e-1597-08dad33e6d83 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YBlIM8e0Eo/NYBfbFDCCPmUDszAhHvtukK2kYjRX5uArBj27OSG9yEY692BxyvpdhmLzHjaqeF6z8fEmgxUSkxgLhByYW56AspkmYEj/YgeedXTnZLJ3gIvU0xkE2FAigm82o6F35YVGIwumrULkOExssSI+xZ8ZteOkBHrQQYefSeUo8rL3r+ZktF8sE0F4POqpyO7AK0KQ3GPEd7y/2ooDpFFXGyn8fCmppEInyOY/OmZBm4Vne3JeDFiSq0qvKgJXt0tukHjlyoq1WlC1jPsgyajNrKgNtzfsMn2mYT1f80Imf2A5MJVqQVIMXdhubxREnticnl6cM8C/SrZipJ8N1p+sZnBxu2p1FM06lB86zhoc/U30pUXsUKBUw/lyZlywZDftfIo0x7rLW9KT4XBMAcn92P6EbF3DYtTJVYVUeMEBvy65/XKKaNgbNXMpfC2qAy47D3qtnfRYnxArcJODnpGGc0EHWM7fN4RatD6XFW9nJNALLHyn9Rpqa6U44+YmuImy/Chm17ozTxvK1avPUPLT+tMa+yMUxdigcEzOBpW4TYkVm1hfv3E+pXiL1MoSacNFhA/8WuQ82lcq6WU7ZDtBQvghlil6rN7MllLHbD0Kr5CEP63KLRZsn0U4AWMqJqIwBbyYpP4fQwD03YqE0t54PFCVK/Lu23Mv5h6i83Up84d+A+ZMVmY5kybeTcnUny4V4/hEyflolbbPixYps/Aog1Bld3k+1bU1bEc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(376002)(346002)(136003)(451199015)(46966006)(36840700001)(40470700004)(356005)(82740400003)(86362001)(82310400005)(36860700001)(81166007)(2906002)(40460700003)(8936002)(44832011)(40480700001)(8676002)(4326008)(41300700001)(5660300002)(7416002)(70586007)(316002)(70206006)(6916009)(54906003)(47076005)(36756003)(7696005)(16526019)(2616005)(26005)(1076003)(186003)(478600001)(426003)(336012)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2022 01:50:30.4305 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f5fae657-f354-467e-1597-08dad33e6d83 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000EE3C.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8186 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org It's a part of the CPUID 0x80000021 leaf, and this allows us to group this and other CPUID 0x80000021 EAX feature bits to being propagated via kvm_set_cpu_caps instead of open-coding them in __do_cpuid_func(). Signed-off-by: Kim Phillips --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 11a0e06362e4..b16fdcedc2b5 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -307,6 +307,7 @@ #define X86_FEATURE_SGX_EDECCSSA (11*32+18) /* "" SGX EDECCSSA user leaf function */ #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ +#define X86_FEATURE_NO_NESTED_DATA_BP (11*32+21) /* "" AMD No Nested Data Breakpoints */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index f53944fb8f7f..079e253e1049 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, + { X86_FEATURE_NO_NESTED_DATA_BP,CPUID_EAX, 0, 0x80000021, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 }