From patchwork Sat Dec 17 17:29:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13075880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57FFFC4332F for ; Sat, 17 Dec 2022 17:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229955AbiLQR3q (ORCPT ); Sat, 17 Dec 2022 12:29:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229915AbiLQR3l (ORCPT ); Sat, 17 Dec 2022 12:29:41 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A872410FC2 for ; Sat, 17 Dec 2022 09:29:40 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id jo4so4014781ejb.7 for ; Sat, 17 Dec 2022 09:29:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6ZSUdi6MPqmLHvEe0ND7y8PBSQThNukontDiEvm1T8g=; b=ynZZBnIu3uHw8ZjTU+ptvD8NAEOs31tgcoL65oO/ziaJtUsIIDjislHra910JvDW+s 3Or/QGT2iRJABqQ+5+Lrq0uvI7J5EmBBjec5B0ed4Dh4mmgt3G/SQkQcZhv+5ouILmAZ IDw4kv8HHlsCPdNam3qvGEzM1xTo6BZIf6vaBMAbESxTVvwNCUdLku4YUNpJoGoD1M5R ptjCRFtTW4fJImCc/odk5Ip3i/zWhGOlwMeNHGUDMDN+0HCYLfqxSom/O7ApsYSBQlqR 2sm3kZXXr/4Mlg7YVNIzT00WyYQfV7oU2ViR7ezs7WfMjFZ68mYw8Hr/vo7zEjLhWFLG M20g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6ZSUdi6MPqmLHvEe0ND7y8PBSQThNukontDiEvm1T8g=; b=MEXUEQFhF/OeGPICmGJ65RI0brdsmnHR694dQvbhlVD3Y4rBujuP7LXYkFvRNgmKXJ sqTooxwdoZAP4wGYdez964G03JJ6Jz2Ras1HBGPaP6wak3gVP1R+au8uA+XqUs0/YiHh LgOusYQ/CASl3DM9iXx/hBDfCPEDHE9V9AU2vKhF8+opUu53q59KUrogYqvgtu5FnBWY 6jHrKqy2eF7/DckJ7qhuBQQvOXnKGYHASgpda98LtCLOwjRF09H4B+nTmECAgmQ0G+mm o3F7A08jb6S96NMCgYCh+Xu6q4po5yDkVPAhQsglmWYuG3z5mbP8V3ymget+/WSbW8QE 9Owg== X-Gm-Message-State: ANoB5plY9rySGiB1VSm7KxSVPZJxS+7TDgWxAavOcMFcoPiQ0SJNB+PO 3XPYd7VuBhBBXxS8vUq1dsIhhg== X-Google-Smtp-Source: AMrXdXvq5oxwBsxndznqbCK8B0fVpBp4xftm2X6MLOx+v8Vfc00Bci5+pJJyScz+r5MkI7euEneKAg== X-Received: by 2002:a17:907:98eb:b0:7c4:fc02:46a3 with SMTP id ke11-20020a17090798eb00b007c4fc0246a3mr12442428ejc.30.1671298180297; Sat, 17 Dec 2022 09:29:40 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id da6-20020a056402176600b0046c7c3755a7sm2203849edb.17.2022.12.17.09.29.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 17 Dec 2022 09:29:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , Bin Meng , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Greg Kurz , Daniel Henrique Barboza , Bernhard Beschow , qemu-riscv@nongnu.org, Song Gao , Artyom Tarasenko , Paolo Bonzini , Palmer Dabbelt , Mark Cave-Ayland , Laurent Vivier , Alistair Francis , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= , David Gibson , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 3/9] target/loongarch/cpu: Restrict "memory.h" header to sysemu Date: Sat, 17 Dec 2022 18:29:01 +0100 Message-Id: <20221217172907.8364-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221217172907.8364-1-philmd@linaro.org> References: <20221217172907.8364-1-philmd@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Missed in 0093b9a5ee ("target/loongarch: Adjust functions and structure to support user-mode") while cleaning commit f84a2aacf5 ("target/loongarch: Add LoongArch IOCSR instruction"). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index c8612f5466..2f17ac6b47 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -12,7 +12,9 @@ #include "fpu/softfloat-types.h" #include "hw/registerfields.h" #include "qemu/timer.h" +#ifndef CONFIG_USER_ONLY #include "exec/memory.h" +#endif #include "cpu-csr.h" #define IOCSRF_TEMP 0