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Fri, 27 Jan 2023 11:42:18 +0000 Received: from AZ-NEU-EX03.Arm.com (10.251.24.31) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 27 Jan 2023 11:42:18 +0000 Received: from e124191.cambridge.arm.com (10.1.197.45) by mail.arm.com (10.251.24.31) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 27 Jan 2023 11:42:12 +0000 From: Joey Gouly To: Andrew Jones , , CC: , Alexandru Elisei , Christoffer Dall , Fuad Tabba , Jean-Philippe Brucker , Joey Gouly , Marc Zyngier , Mark Rutland , Oliver Upton , Paolo Bonzini , Quentin Perret , Steven Price , Suzuki K Poulose , "Thomas Huth" , Will Deacon , Zenghui Yu , , , , Subject: [RFC kvm-unit-tests 11/27] arm: realm: Early memory setup Date: Fri, 27 Jan 2023 11:40:52 +0000 Message-ID: <20230127114108.10025-12-joey.gouly@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230127114108.10025-1-joey.gouly@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127114108.10025-1-joey.gouly@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT012:EE_|PA4PR08MB6269:EE_|AM7EUR03FT054:EE_|PAWPR08MB10240:EE_ X-MS-Office365-Filtering-Correlation-Id: 45178ec4-0369-4818-7a6d-08db005b92b1 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2023 11:42:30.5404 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 45178ec4-0369-4818-7a6d-08db005b92b1 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT054.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR08MB10240 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Suzuki K Poulose A Realm must mark areas of memory as RIPAS_RAM before an access is made. The binary image is loaded by the VMM and thus the area is converted. However, the file image may not cover tail portion of the "memory" image (e.g, BSS, stack etc.). Convert the area touched by the early boot code to RAM before the access is made in early assembly code. Once, we land in the C code, we take care of converting the entire RAM region to RIPAS_RAM. Please note that this operation doesn't require the host to commit memory to the Realm. Signed-off-by: Suzuki K Poulose Co-developed-by: Jean-Philippe Brucker Signed-off-by: Jean-Philippe Brucker Co-developed-by: Joey Gouly Signed-off-by: Joey Gouly --- arm/cstart64.S | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arm/cstart64.S b/arm/cstart64.S index b689b132..b0861594 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -14,6 +14,7 @@ #include #include #include +#include .macro zero_range, tmp1, tmp2 9998: cmp \tmp1, \tmp2 @@ -61,6 +62,7 @@ start: b 1b 1: + bl __early_mem_setup /* zero BSS */ adrp x4, bss add x4, x4, :lo12:bss @@ -170,6 +172,76 @@ arm_smccc_hvc: arm_smccc_smc: do_smccc_call smc +__early_mem_setup: + /* Preserve x0 - x3 */ + mov x5, x0 + mov x6, x1 + mov x7, x2 + mov x8, x3 + + /* + * Check for EL3, otherwise an SMC instruction + * will cause an UNDEFINED exception. + */ + mrs x9, ID_AA64PFR0_EL1 + lsr x9, x9, #12 + and x9, x9, 0b11 + cbnz x9, 1f + ret + +1: + /* + * Are we a realm? Request the RSI ABI version. + * If KVM is catching SMCs, it returns an error in x0 (~0UL) + */ + ldr x0, =SMC_RSI_ABI_VERSION + smc #0 + + ldr x1, =RSI_ABI_VERSION + cmp x0, x1 + bne 3f + + /* + * For realms, we must mark area from bss + * to the end of stack as memory before it is + * accessed, as they are not populated as part + * of the initial image. As such we can run + * this unconditionally irrespective of whether + * we are a normal VM or Realm. + * + * x1 = bss_start. + */ + adrp x1, bss + + /* x9 = (end of stack - bss_start) */ + adrp x9, (stacktop + PAGE_SIZE) +2: + /* calculate the size as (end - start) */ + sub x2, x9, x1 + + /* x3 = RIPAS_RAM */ + mov x3, #1 + + /* x0 = SMC_RSI_IPA_STATE_SET */ + movz x0, :abs_g2_s:SMC_RSI_IPA_STATE_SET + movk x0, :abs_g1_nc:SMC_RSI_IPA_STATE_SET + movk x0, :abs_g0_nc:SMC_RSI_IPA_STATE_SET + + /* Run the RSI request */ + smc #0 + + /* halt if there is an error */ + cbnz x0, halt + + cmp x1, x9 + bne 2b +3: + mov x3, x8 + mov x2, x7 + mov x1, x6 + mov x0, x5 + ret + get_mmu_off: adrp x0, auxinfo ldr x0, [x0, :lo12:auxinfo + 8]