Message ID | 20230216142123.2638675-3-maz@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: arm64: Rework timer offsetting for fun and profit | expand |
Hi Marc, On Thu, Feb 16, 2023 at 6:21 AM Marc Zyngier <maz@kernel.org> wrote: > > Add the probing code for the FEAT_ECV variant that implements CNTPOFF_EL2. > Why is it optional is a mystery, but let's try and detect it. > > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/arm64/kernel/cpufeature.c | 11 +++++++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 12 insertions(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 23bd2a926b74..36852f96898d 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2186,6 +2186,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .sign = FTR_UNSIGNED, > .min_field_value = 1, > }, > + { > + .desc = "Enhanced Counter Virtualization (CNTPOFF)", > + .capability = ARM64_HAS_ECV_CNTPOFF, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .matches = has_cpuid_feature, > + .sys_reg = SYS_ID_AA64MMFR0_EL1, > + .field_pos = ID_AA64MMFR0_EL1_ECV_SHIFT, > + .field_width = 4, > + .sign = FTR_UNSIGNED, > + .min_field_value = 2, Nit: You might want to use ID_AA64MMFR0_EL1_ECV_CNTPOFF (instead of 2) ? Reviewed-by: Reiji Watanabe <reijiw@google.com> Thank you, Reiji > + }, > #ifdef CONFIG_ARM64_PAN > { > .desc = "Privileged Access Never", > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index 82c7e579a8ba..6a26a4678406 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -23,6 +23,7 @@ HAS_DCPOP > HAS_DIT > HAS_E0PD > HAS_ECV > +HAS_ECV_CNTPOFF > HAS_EPAN > HAS_GENERIC_AUTH > HAS_GENERIC_AUTH_ARCH_QARMA3 > -- > 2.34.1 > >
On Wed, 22 Feb 2023 04:30:00 +0000, Reiji Watanabe <reijiw@google.com> wrote: > > Hi Marc, > > On Thu, Feb 16, 2023 at 6:21 AM Marc Zyngier <maz@kernel.org> wrote: > > > > Add the probing code for the FEAT_ECV variant that implements CNTPOFF_EL2. > > Why is it optional is a mystery, but let's try and detect it. > > > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > --- > > arch/arm64/kernel/cpufeature.c | 11 +++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 2 files changed, 12 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 23bd2a926b74..36852f96898d 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -2186,6 +2186,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > > .sign = FTR_UNSIGNED, > > .min_field_value = 1, > > }, > > + { > > + .desc = "Enhanced Counter Virtualization (CNTPOFF)", > > + .capability = ARM64_HAS_ECV_CNTPOFF, > > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > > + .matches = has_cpuid_feature, > > + .sys_reg = SYS_ID_AA64MMFR0_EL1, > > + .field_pos = ID_AA64MMFR0_EL1_ECV_SHIFT, > > + .field_width = 4, > > + .sign = FTR_UNSIGNED, > > + .min_field_value = 2, > > Nit: You might want to use ID_AA64MMFR0_EL1_ECV_CNTPOFF (instead of 2) ? Ah, of course! ;-) > Reviewed-by: Reiji Watanabe <reijiw@google.com> Thanks, M.
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 23bd2a926b74..36852f96898d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2186,6 +2186,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .sign = FTR_UNSIGNED, .min_field_value = 1, }, + { + .desc = "Enhanced Counter Virtualization (CNTPOFF)", + .capability = ARM64_HAS_ECV_CNTPOFF, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = has_cpuid_feature, + .sys_reg = SYS_ID_AA64MMFR0_EL1, + .field_pos = ID_AA64MMFR0_EL1_ECV_SHIFT, + .field_width = 4, + .sign = FTR_UNSIGNED, + .min_field_value = 2, + }, #ifdef CONFIG_ARM64_PAN { .desc = "Privileged Access Never", diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 82c7e579a8ba..6a26a4678406 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -23,6 +23,7 @@ HAS_DCPOP HAS_DIT HAS_E0PD HAS_ECV +HAS_ECV_CNTPOFF HAS_EPAN HAS_GENERIC_AUTH HAS_GENERIC_AUTH_ARCH_QARMA3
Add the probing code for the FEAT_ECV variant that implements CNTPOFF_EL2. Why is it optional is a mystery, but let's try and detect it. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/kernel/cpufeature.c | 11 +++++++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 12 insertions(+)