@@ -55,6 +55,8 @@
#define X86_CR0_PG BIT(X86_CR0_PG_BIT)
#define X86_CR3_PCID_MASK GENMASK(11, 0)
+#define X86_CR3_LAM_U57_BIT (61)
+#define X86_CR3_LAM_U48_BIT (62)
#define X86_CR4_VME_BIT (0)
#define X86_CR4_VME BIT(X86_CR4_VME_BIT)
@@ -7000,7 +7000,11 @@ static void test_host_ctl_regs(void)
cr3 = cr3_saved | (1ul << i);
vmcs_write(HOST_CR3, cr3);
report_prefix_pushf("HOST_CR3 %lx", cr3);
- test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
+ if (this_cpu_has(X86_FEATURE_LAM) &&
+ ((i==X86_CR3_LAM_U57_BIT) || (i==X86_CR3_LAM_U48_BIT)))
+ test_vmx_vmlaunch(0);
+ else
+ test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
report_prefix_pop();
}
If LAM is supported, VM entry allows CR3.LAM_U48 (bit 62) and CR3.LAM_U57 (bit 61) to be set in CR3 field. Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57 on vmlaunch tests when LAM is supported. Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> --- lib/x86/processor.h | 2 ++ x86/vmx_tests.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-)