| Message ID | 20230319083732.29458-2-binbin.wu@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86: Add test cases for LAM | expand |
On Sun, Mar 19, 2023 at 04:37:29PM +0800, Binbin Wu wrote: >If LAM is supported, VM entry allows CR3.LAM_U48 (bit 62) and CR3.LAM_U57 >(bit 61) to be set in CR3 field. > >Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57 >on vmlaunch tests when LAM is supported. > >Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> Reviewed-by: Chao Gao <chao.gao@intel.com> and two nits below: >--- > lib/x86/processor.h | 2 ++ > x86/vmx_tests.c | 6 +++++- > 2 files changed, 7 insertions(+), 1 deletion(-) > >diff --git a/lib/x86/processor.h b/lib/x86/processor.h >index 3d58ef7..8373bbe 100644 >--- a/lib/x86/processor.h >+++ b/lib/x86/processor.h >@@ -55,6 +55,8 @@ > #define X86_CR0_PG BIT(X86_CR0_PG_BIT) > > #define X86_CR3_PCID_MASK GENMASK(11, 0) >+#define X86_CR3_LAM_U57_BIT (61) >+#define X86_CR3_LAM_U48_BIT (62) > > #define X86_CR4_VME_BIT (0) > #define X86_CR4_VME BIT(X86_CR4_VME_BIT) >diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c >index 7bba816..1be22ac 100644 >--- a/x86/vmx_tests.c >+++ b/x86/vmx_tests.c >@@ -7000,7 +7000,11 @@ static void test_host_ctl_regs(void) > cr3 = cr3_saved | (1ul << i); > vmcs_write(HOST_CR3, cr3); > report_prefix_pushf("HOST_CR3 %lx", cr3); >- test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); >+ if (this_cpu_has(X86_FEATURE_LAM) && Nit: X86_FEATURE_LAM should be defined in this patch (instead of patch 2). >+ ((i==X86_CR3_LAM_U57_BIT) || (i==X86_CR3_LAM_U48_BIT))) Nit: spaces are needed around "==" i.e., ((i == X86_CR3_LAM_U57_BIT) || (i == X86_CR3_LAM_U48_BIT))) >+ test_vmx_vmlaunch(0); >+ else >+ test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); > report_prefix_pop(); > } > >-- >2.25.1 >
On 4/4/2023 1:51 PM, Chao Gao wrote: > On Sun, Mar 19, 2023 at 04:37:29PM +0800, Binbin Wu wrote: >> If LAM is supported, VM entry allows CR3.LAM_U48 (bit 62) and CR3.LAM_U57 >> (bit 61) to be set in CR3 field. >> >> Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57 >> on vmlaunch tests when LAM is supported. >> >> Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> > Reviewed-by: Chao Gao <chao.gao@intel.com> > > and two nits below: Thanks, will update it. > >> --- >> lib/x86/processor.h | 2 ++ >> x86/vmx_tests.c | 6 +++++- >> 2 files changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/lib/x86/processor.h b/lib/x86/processor.h >> index 3d58ef7..8373bbe 100644 >> --- a/lib/x86/processor.h >> +++ b/lib/x86/processor.h >> @@ -55,6 +55,8 @@ >> #define X86_CR0_PG BIT(X86_CR0_PG_BIT) >> >> #define X86_CR3_PCID_MASK GENMASK(11, 0) >> +#define X86_CR3_LAM_U57_BIT (61) >> +#define X86_CR3_LAM_U48_BIT (62) >> >> #define X86_CR4_VME_BIT (0) >> #define X86_CR4_VME BIT(X86_CR4_VME_BIT) >> diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c >> index 7bba816..1be22ac 100644 >> --- a/x86/vmx_tests.c >> +++ b/x86/vmx_tests.c >> @@ -7000,7 +7000,11 @@ static void test_host_ctl_regs(void) >> cr3 = cr3_saved | (1ul << i); >> vmcs_write(HOST_CR3, cr3); >> report_prefix_pushf("HOST_CR3 %lx", cr3); >> - test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); >> + if (this_cpu_has(X86_FEATURE_LAM) && > Nit: X86_FEATURE_LAM should be defined in this patch (instead of patch 2). > >> + ((i==X86_CR3_LAM_U57_BIT) || (i==X86_CR3_LAM_U48_BIT))) > Nit: spaces are needed around "==" i.e., > > ((i == X86_CR3_LAM_U57_BIT) || (i == X86_CR3_LAM_U48_BIT))) > >> + test_vmx_vmlaunch(0); >> + else >> + test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); >> report_prefix_pop(); >> } >> >> -- >> 2.25.1 >>
diff --git a/lib/x86/processor.h b/lib/x86/processor.h index 3d58ef7..8373bbe 100644 --- a/lib/x86/processor.h +++ b/lib/x86/processor.h @@ -55,6 +55,8 @@ #define X86_CR0_PG BIT(X86_CR0_PG_BIT) #define X86_CR3_PCID_MASK GENMASK(11, 0) +#define X86_CR3_LAM_U57_BIT (61) +#define X86_CR3_LAM_U48_BIT (62) #define X86_CR4_VME_BIT (0) #define X86_CR4_VME BIT(X86_CR4_VME_BIT) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 7bba816..1be22ac 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -7000,7 +7000,11 @@ static void test_host_ctl_regs(void) cr3 = cr3_saved | (1ul << i); vmcs_write(HOST_CR3, cr3); report_prefix_pushf("HOST_CR3 %lx", cr3); - test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); + if (this_cpu_has(X86_FEATURE_LAM) && + ((i==X86_CR3_LAM_U57_BIT) || (i==X86_CR3_LAM_U48_BIT))) + test_vmx_vmlaunch(0); + else + test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); report_prefix_pop(); }
If LAM is supported, VM entry allows CR3.LAM_U48 (bit 62) and CR3.LAM_U57 (bit 61) to be set in CR3 field. Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57 on vmlaunch tests when LAM is supported. Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> --- lib/x86/processor.h | 2 ++ x86/vmx_tests.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-)