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[176.184.52.81]) by smtp.gmail.com with ESMTPSA id q12-20020adff78c000000b002c5d3f0f737sm14591138wrp.30.2023.04.05.03.19.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 05 Apr 2023 03:19:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , xen-devel@lists.xenproject.org, kvm@vger.kernel.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Reinoud Zandijk Subject: [PATCH 10/14] accel: Rename NVMM struct qemu_vcpu -> struct AccelvCPUState Date: Wed, 5 Apr 2023 12:18:07 +0200 Message-Id: <20230405101811.76663-11-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230405101811.76663-1-philmd@linaro.org> References: <20230405101811.76663-1-philmd@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We want all accelerators to share the same opaque pointer in CPUState. Rename NVMM 'qemu_vcpu' as 'AccelvCPUState'. Replace g_try_malloc0() by g_try_new0() for readability. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/nvmm/nvmm-all.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 45fd318d23..97a7225598 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -26,7 +26,7 @@ #include -struct qemu_vcpu { +struct AccelvCPUState { struct nvmm_vcpu vcpu; uint8_t tpr; bool stop; @@ -49,10 +49,10 @@ struct qemu_machine { static bool nvmm_allowed; static struct qemu_machine qemu_mach; -static struct qemu_vcpu * +static struct AccelvCPUState * get_qemu_vcpu(CPUState *cpu) { - return (struct qemu_vcpu *)cpu->accel; + return cpu->accel; } static struct nvmm_machine * @@ -86,7 +86,7 @@ nvmm_set_registers(CPUState *cpu) { CPUX86State *env = cpu->env_ptr; struct nvmm_machine *mach = get_nvmm_mach(); - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; struct nvmm_x64_state *state = vcpu->state; uint64_t bitmap; @@ -223,7 +223,7 @@ nvmm_get_registers(CPUState *cpu) { CPUX86State *env = cpu->env_ptr; struct nvmm_machine *mach = get_nvmm_mach(); - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; X86CPU *x86_cpu = X86_CPU(cpu); struct nvmm_x64_state *state = vcpu->state; @@ -347,7 +347,7 @@ static bool nvmm_can_take_int(CPUState *cpu) { CPUX86State *env = cpu->env_ptr; - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; struct nvmm_machine *mach = get_nvmm_mach(); @@ -372,7 +372,7 @@ nvmm_can_take_int(CPUState *cpu) static bool nvmm_can_take_nmi(CPUState *cpu) { - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); /* * Contrary to INTs, NMIs always schedule an exit when they are @@ -395,7 +395,7 @@ nvmm_vcpu_pre_run(CPUState *cpu) { CPUX86State *env = cpu->env_ptr; struct nvmm_machine *mach = get_nvmm_mach(); - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; X86CPU *x86_cpu = X86_CPU(cpu); struct nvmm_x64_state *state = vcpu->state; @@ -478,7 +478,7 @@ nvmm_vcpu_pre_run(CPUState *cpu) static void nvmm_vcpu_post_run(CPUState *cpu, struct nvmm_vcpu_exit *exit) { - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); CPUX86State *env = cpu->env_ptr; X86CPU *x86_cpu = X86_CPU(cpu); uint64_t tpr; @@ -565,7 +565,7 @@ static int nvmm_handle_rdmsr(struct nvmm_machine *mach, CPUState *cpu, struct nvmm_vcpu_exit *exit) { - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; X86CPU *x86_cpu = X86_CPU(cpu); struct nvmm_x64_state *state = vcpu->state; @@ -610,7 +610,7 @@ static int nvmm_handle_wrmsr(struct nvmm_machine *mach, CPUState *cpu, struct nvmm_vcpu_exit *exit) { - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; X86CPU *x86_cpu = X86_CPU(cpu); struct nvmm_x64_state *state = vcpu->state; @@ -686,7 +686,7 @@ nvmm_vcpu_loop(CPUState *cpu) { CPUX86State *env = cpu->env_ptr; struct nvmm_machine *mach = get_nvmm_mach(); - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); struct nvmm_vcpu *vcpu = &qcpu->vcpu; X86CPU *x86_cpu = X86_CPU(cpu); struct nvmm_vcpu_exit *exit = vcpu->exit; @@ -892,7 +892,7 @@ static void nvmm_ipi_signal(int sigcpu) { if (current_cpu) { - struct qemu_vcpu *qcpu = get_qemu_vcpu(current_cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(current_cpu); #if NVMM_USER_VERSION >= 2 struct nvmm_vcpu *vcpu = &qcpu->vcpu; nvmm_vcpu_stop(vcpu); @@ -926,7 +926,7 @@ nvmm_init_vcpu(CPUState *cpu) struct nvmm_vcpu_conf_cpuid cpuid; struct nvmm_vcpu_conf_tpr tpr; Error *local_error = NULL; - struct qemu_vcpu *qcpu; + struct AccelvCPUState *qcpu; int ret, err; nvmm_init_cpu_signals(); @@ -942,7 +942,7 @@ nvmm_init_vcpu(CPUState *cpu) } } - qcpu = g_try_malloc0(sizeof(*qcpu)); + qcpu = g_try_new0(struct AccelvCPUState, 1); if (qcpu == NULL) { error_report("NVMM: Failed to allocate VCPU context."); return -ENOMEM; @@ -995,7 +995,7 @@ nvmm_init_vcpu(CPUState *cpu) } cpu->vcpu_dirty = true; - cpu->accel = (struct AccelvCPUState *)qcpu; + cpu->accel = qcpu; return 0; } @@ -1027,7 +1027,7 @@ void nvmm_destroy_vcpu(CPUState *cpu) { struct nvmm_machine *mach = get_nvmm_mach(); - struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu); + struct AccelvCPUState *qcpu = get_qemu_vcpu(cpu); nvmm_vcpu_destroy(mach, &qcpu->vcpu); g_free(cpu->accel);