Message ID | 20230515173103.1017669-6-maz@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: arm64: ARMv8.3/8.4 Nested Virtualization support | expand |
On 5/15/23 19:30, Marc Zyngier wrote: > Add the missing DC *VA encodings. > > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/arm64/include/asm/sysreg.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 71305f7425db..28ccc379a172 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -150,6 +150,11 @@ > #define SYS_DC_CIGVAC sys_insn(1, 3, 7, 14, 3) > #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5) > > +/* Data cache zero operations */ > +#define SYS_DC_ZVA sys_insn(1, 3, 7, 4, 1) > +#define SYS_DC_GVA sys_insn(1, 3, 7, 4, 3) > +#define SYS_DC_GZVA sys_insn(1, 3, 7, 4, 4) > + > /* > * Automatically generated definitions for system registers, the > * manual encodings below are in the process of being converted to Reviewed-by: Eric Auger <eric.auger@redhat.com> Eric
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 71305f7425db..28ccc379a172 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -150,6 +150,11 @@ #define SYS_DC_CIGVAC sys_insn(1, 3, 7, 14, 3) #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5) +/* Data cache zero operations */ +#define SYS_DC_ZVA sys_insn(1, 3, 7, 4, 1) +#define SYS_DC_GVA sys_insn(1, 3, 7, 4, 3) +#define SYS_DC_GZVA sys_insn(1, 3, 7, 4, 4) + /* * Automatically generated definitions for system registers, the * manual encodings below are in the process of being converted to
Add the missing DC *VA encodings. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/include/asm/sysreg.h | 5 +++++ 1 file changed, 5 insertions(+)