| Message ID | 20230517105135.1871868-3-apatel@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RISC-V KVM in-kernel AIA irqchip | expand |
On Wed, May 17, 2023 at 3:51 AM Anup Patel <apatel@ventanamicro.com> wrote: > > We add IMSIC related defines in a separate header so that different > parts of KVM code can share it. Once AIA drivers are merged will > have a common IMSIC header shared by both KVM and IRQCHIP driver. > > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > arch/riscv/include/asm/kvm_aia_imsic.h | 38 ++++++++++++++++++++++++++ > arch/riscv/kvm/aia.c | 3 +- > 2 files changed, 39 insertions(+), 2 deletions(-) > create mode 100644 arch/riscv/include/asm/kvm_aia_imsic.h > > diff --git a/arch/riscv/include/asm/kvm_aia_imsic.h b/arch/riscv/include/asm/kvm_aia_imsic.h > new file mode 100644 > index 000000000000..da5881d2bde0 > --- /dev/null > +++ b/arch/riscv/include/asm/kvm_aia_imsic.h > @@ -0,0 +1,38 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + * Copyright (C) 2022 Ventana Micro Systems Inc. > + */ > +#ifndef __KVM_RISCV_AIA_IMSIC_H > +#define __KVM_RISCV_AIA_IMSIC_H > + > +#include <linux/types.h> > +#include <asm/csr.h> > + > +#define IMSIC_MMIO_PAGE_SHIFT 12 > +#define IMSIC_MMIO_PAGE_SZ (1UL << IMSIC_MMIO_PAGE_SHIFT) > +#define IMSIC_MMIO_PAGE_LE 0x00 > +#define IMSIC_MMIO_PAGE_BE 0x04 > + > +#define IMSIC_MIN_ID 63 > +#define IMSIC_MAX_ID 2048 > + > +#define IMSIC_EIDELIVERY 0x70 > + > +#define IMSIC_EITHRESHOLD 0x72 > + > +#define IMSIC_EIP0 0x80 > +#define IMSIC_EIP63 0xbf > +#define IMSIC_EIPx_BITS 32 > + > +#define IMSIC_EIE0 0xc0 > +#define IMSIC_EIE63 0xff > +#define IMSIC_EIEx_BITS 32 > + > +#define IMSIC_FIRST IMSIC_EIDELIVERY > +#define IMSIC_LAST IMSIC_EIE63 > + > +#define IMSIC_MMIO_SETIPNUM_LE 0x00 > +#define IMSIC_MMIO_SETIPNUM_BE 0x04 > + > +#endif > diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c > index 1cee75a8c883..c78c06d99e39 100644 > --- a/arch/riscv/kvm/aia.c > +++ b/arch/riscv/kvm/aia.c > @@ -15,6 +15,7 @@ > #include <linux/percpu.h> > #include <linux/spinlock.h> > #include <asm/hwcap.h> > +#include <asm/kvm_aia_imsic.h> > > struct aia_hgei_control { > raw_spinlock_t lock; > @@ -364,8 +365,6 @@ static int aia_rmw_iprio(struct kvm_vcpu *vcpu, unsigned int isel, > return KVM_INSN_CONTINUE_NEXT_SEPC; > } > > -#define IMSIC_FIRST 0x70 > -#define IMSIC_LAST 0xff > int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num, > unsigned long *val, unsigned long new_val, > unsigned long wr_mask) > -- > 2.34.1 > Reviewed-by: Atish Patra <atishp@rivosinc.com>
diff --git a/arch/riscv/include/asm/kvm_aia_imsic.h b/arch/riscv/include/asm/kvm_aia_imsic.h new file mode 100644 index 000000000000..da5881d2bde0 --- /dev/null +++ b/arch/riscv/include/asm/kvm_aia_imsic.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2021 Western Digital Corporation or its affiliates. + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ +#ifndef __KVM_RISCV_AIA_IMSIC_H +#define __KVM_RISCV_AIA_IMSIC_H + +#include <linux/types.h> +#include <asm/csr.h> + +#define IMSIC_MMIO_PAGE_SHIFT 12 +#define IMSIC_MMIO_PAGE_SZ (1UL << IMSIC_MMIO_PAGE_SHIFT) +#define IMSIC_MMIO_PAGE_LE 0x00 +#define IMSIC_MMIO_PAGE_BE 0x04 + +#define IMSIC_MIN_ID 63 +#define IMSIC_MAX_ID 2048 + +#define IMSIC_EIDELIVERY 0x70 + +#define IMSIC_EITHRESHOLD 0x72 + +#define IMSIC_EIP0 0x80 +#define IMSIC_EIP63 0xbf +#define IMSIC_EIPx_BITS 32 + +#define IMSIC_EIE0 0xc0 +#define IMSIC_EIE63 0xff +#define IMSIC_EIEx_BITS 32 + +#define IMSIC_FIRST IMSIC_EIDELIVERY +#define IMSIC_LAST IMSIC_EIE63 + +#define IMSIC_MMIO_SETIPNUM_LE 0x00 +#define IMSIC_MMIO_SETIPNUM_BE 0x04 + +#endif diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 1cee75a8c883..c78c06d99e39 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -15,6 +15,7 @@ #include <linux/percpu.h> #include <linux/spinlock.h> #include <asm/hwcap.h> +#include <asm/kvm_aia_imsic.h> struct aia_hgei_control { raw_spinlock_t lock; @@ -364,8 +365,6 @@ static int aia_rmw_iprio(struct kvm_vcpu *vcpu, unsigned int isel, return KVM_INSN_CONTINUE_NEXT_SEPC; } -#define IMSIC_FIRST 0x70 -#define IMSIC_LAST 0xff int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num, unsigned long *val, unsigned long new_val, unsigned long wr_mask)
We add IMSIC related defines in a separate header so that different parts of KVM code can share it. Once AIA drivers are merged will have a common IMSIC header shared by both KVM and IRQCHIP driver. Signed-off-by: Anup Patel <apatel@ventanamicro.com> --- arch/riscv/include/asm/kvm_aia_imsic.h | 38 ++++++++++++++++++++++++++ arch/riscv/kvm/aia.c | 3 +- 2 files changed, 39 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/kvm_aia_imsic.h