[v12,24/31] LoongArch: KVM: Implement handle mmio exception

Message ID	20230530015223.147755-25-zhaotianrui@loongson.cn (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@vger.kernel.org> From: Tianrui Zhao <zhaotianrui@loongson.cn> To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini <pbonzini@redhat.com>, Huacai Chen <chenhuacai@kernel.org>, WANG Xuerui <kernel@xen0n.name>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, loongarch@lists.linux.dev, Jens Axboe <axboe@kernel.dk>, Mark Brown <broonie@kernel.org>, Alex Deucher <alexander.deucher@amd.com>, Oliver Upton <oliver.upton@linux.dev>, maobibo@loongson.cn, Xi Ruoyao <xry111@xry111.site>, zhaotianrui@loongson.cn Subject: [PATCH v12 24/31] LoongArch: KVM: Implement handle mmio exception Date: Tue, 30 May 2023 09:52:16 +0800 Message-Id: <20230530015223.147755-25-zhaotianrui@loongson.cn> In-Reply-To: <20230530015223.147755-1-zhaotianrui@loongson.cn> References: <20230530015223.147755-1-zhaotianrui@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add KVM LoongArch support \| expand [v12,00/31] Add KVM LoongArch support [v12,01/31] LoongArch: KVM: Add kvm related header files [v12,02/31] LoongArch: KVM: Implement kvm module related interface [v12,03/31] LoongArch: KVM: Implement kvm hardware enable, disable interface [v12,04/31] LoongArch: KVM: Implement VM related functions [v12,05/31] LoongArch: KVM: Add vcpu related header files [v12,06/31] LoongArch: KVM: Implement vcpu create and destroy interface [v12,07/31] LoongArch: KVM: Implement vcpu run interface [v12,08/31] LoongArch: KVM: Implement vcpu handle exit interface [v12,09/31] LoongArch: KVM: Implement vcpu get, vcpu set registers [v12,10/31] LoongArch: KVM: Implement vcpu ENABLE_CAP ioctl interface [v12,11/31] LoongArch: KVM: Implement fpu related operations for vcpu [v12,12/31] LoongArch: KVM: Implement vcpu interrupt operations [v12,13/31] LoongArch: KVM: Implement misc vcpu related interfaces [v12,14/31] LoongArch: KVM: Implement vcpu load and vcpu put operations [v12,15/31] LoongArch: KVM: Implement vcpu status description [v12,16/31] LoongArch: KVM: Implement update VM id function [v12,17/31] LoongArch: KVM: Implement virtual machine tlb operations [v12,18/31] LoongArch: KVM: Implement vcpu timer operations [v12,19/31] LoongArch: KVM: Implement kvm mmu operations [v12,20/31] LoongArch: KVM: Implement handle csr excption [v12,21/31] LoongArch: KVM: Implement handle iocsr exception [v12,22/31] LoongArch: KVM: Implement handle idle exception [v12,23/31] LoongArch: KVM: Implement handle gspr exception [v12,24/31] LoongArch: KVM: Implement handle mmio exception [v12,25/31] LoongArch: KVM: Implement handle fpu exception [v12,26/31] LoongArch: KVM: Implement kvm exception vector [v12,27/31] LoongArch: KVM: Implement vcpu world switch [v12,28/31] LoongArch: KVM: Implement probe virtualization when LoongArch cpu init [v12,29/31] LoongArch: KVM: Enable kvm config and add the makefile [v12,30/31] LoongArch: KVM: Supplement kvm document about LoongArch-specific part [v12,31/31] LoongArch: KVM: Add maintainers for LoongArch KVM

Message ID

20230530015223.147755-25-zhaotianrui@loongson.cn (mailing list archive)

State

New, archived

Headers

From: Tianrui Zhao <zhaotianrui@loongson.cn>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
        Huacai Chen <chenhuacai@kernel.org>,
        WANG Xuerui <kernel@xen0n.name>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        loongarch@lists.linux.dev, Jens Axboe <axboe@kernel.dk>,
        Mark Brown <broonie@kernel.org>,
        Alex Deucher <alexander.deucher@amd.com>,
        Oliver Upton <oliver.upton@linux.dev>, maobibo@loongson.cn,
        Xi Ruoyao <xry111@xry111.site>, zhaotianrui@loongson.cn
Subject: [PATCH v12 24/31] LoongArch: KVM: Implement handle mmio exception
Date: Tue, 30 May 2023 09:52:16 +0800
Message-Id: <20230530015223.147755-25-zhaotianrui@loongson.cn>
In-Reply-To: <20230530015223.147755-1-zhaotianrui@loongson.cn>
References: <20230530015223.147755-1-zhaotianrui@loongson.cn>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

Add KVM LoongArch support | expand

Commit Message

zhaotianrui May 30, 2023, 1:52 a.m. UTC

Implement handle mmio exception, setting the mmio info into vcpu_run and
return to user space to handle it.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
---
 arch/loongarch/kvm/exit.c | 308 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 308 insertions(+)

Comments

bibo mao June 6, 2023, 1:41 a.m. UTC | #1

Reviewed-by: Bibo, Mao <maobibo@loongson.cn>

在 2023/5/30 09:52, Tianrui Zhao 写道:
> Implement handle mmio exception, setting the mmio info into vcpu_run and
> return to user space to handle it.
> 
> Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
> ---
>  arch/loongarch/kvm/exit.c | 308 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 308 insertions(+)
> 
> diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c
> index 26283a9d3c6d..1237ceb06d0c 100644
> --- a/arch/loongarch/kvm/exit.c
> +++ b/arch/loongarch/kvm/exit.c
> @@ -209,6 +209,265 @@ int _kvm_emu_idle(struct kvm_vcpu *vcpu)
>  	return EMULATE_DONE;
>  }
>  
> +int _kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)
> +{
> +	struct kvm_run *run = vcpu->run;
> +	unsigned int rd, op8, opcode;
> +	unsigned long rd_val = 0;
> +	void *data = run->mmio.data;
> +	unsigned long curr_pc;
> +	int ret;
> +
> +	/*
> +	 * Update PC and hold onto current PC in case there is
> +	 * an error and we want to rollback the PC
> +	 */
> +	curr_pc = vcpu->arch.pc;
> +	update_pc(&vcpu->arch);
> +
> +	op8 = (inst.word >> 24) & 0xff;
> +	run->mmio.phys_addr = vcpu->arch.badv;
> +	ret = EMULATE_DO_MMIO;
> +	if (op8 < 0x28) {
> +		/* stptrw/d process */
> +		rd = inst.reg2i14_format.rd;
> +		opcode = inst.reg2i14_format.opcode;
> +
> +		switch (opcode) {
> +		case stptrd_op:
> +			run->mmio.len = 8;
> +			*(unsigned long *)data = vcpu->arch.gprs[rd];
> +			break;
> +		case stptrw_op:
> +			run->mmio.len = 4;
> +			*(unsigned int *)data = vcpu->arch.gprs[rd];
> +			break;
> +		default:
> +			ret = EMULATE_FAIL;
> +			break;
> +		}
> +	} else if (op8 < 0x30) {
> +		/* st.b/h/w/d  process */
> +		rd = inst.reg2i12_format.rd;
> +		opcode = inst.reg2i12_format.opcode;
> +		rd_val = vcpu->arch.gprs[rd];
> +
> +		switch (opcode) {
> +		case std_op:
> +			run->mmio.len = 8;
> +			*(unsigned long *)data = rd_val;
> +			break;
> +		case stw_op:
> +			run->mmio.len = 4;
> +			*(unsigned int *)data = rd_val;
> +			break;
> +		case sth_op:
> +			run->mmio.len = 2;
> +			*(unsigned short *)data = rd_val;
> +			break;
> +		case stb_op:
> +			run->mmio.len = 1;
> +			*(unsigned char *)data = rd_val;
> +			break;
> +		default:
> +			ret = EMULATE_FAIL;
> +			break;
> +		}
> +	} else if (op8 == 0x38) {
> +		/* stxb/h/w/d process */
> +		rd = inst.reg3_format.rd;
> +		opcode = inst.reg3_format.opcode;
> +
> +		switch (opcode) {
> +		case stxb_op:
> +			run->mmio.len = 1;
> +			*(unsigned char *)data = vcpu->arch.gprs[rd];
> +			break;
> +		case stxh_op:
> +			run->mmio.len = 2;
> +			*(unsigned short *)data = vcpu->arch.gprs[rd];
> +			break;
> +		case stxw_op:
> +			run->mmio.len = 4;
> +			*(unsigned int *)data = vcpu->arch.gprs[rd];
> +			break;
> +		case stxd_op:
> +			run->mmio.len = 8;
> +			*(unsigned long *)data = vcpu->arch.gprs[rd];
> +			break;
> +		default:
> +			ret = EMULATE_FAIL;
> +			break;
> +		}
> +	} else
> +		ret = EMULATE_FAIL;
> +
> +	if (ret == EMULATE_DO_MMIO) {
> +		run->mmio.is_write = 1;
> +		vcpu->mmio_needed = 1;
> +		vcpu->mmio_is_write = 1;
> +	} else {
> +		vcpu->arch.pc = curr_pc;
> +		kvm_err("Write not supporded inst=0x%08x @%lx BadVaddr:%#lx\n",
> +			inst.word, vcpu->arch.pc, vcpu->arch.badv);
> +		kvm_arch_vcpu_dump_regs(vcpu);
> +		/* Rollback PC if emulation was unsuccessful */
> +	}
> +
> +	return ret;
> +}
> +
> +int _kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)
> +{
> +	unsigned int op8, opcode, rd;
> +	struct kvm_run *run = vcpu->run;
> +	int ret;
> +
> +	run->mmio.phys_addr = vcpu->arch.badv;
> +	vcpu->mmio_needed = 2;	/* signed */
> +	op8 = (inst.word >> 24) & 0xff;
> +	ret = EMULATE_DO_MMIO;
> +
> +	if (op8 < 0x28) {
> +		/* ldptr.w/d process */
> +		rd = inst.reg2i14_format.rd;
> +		opcode = inst.reg2i14_format.opcode;
> +
> +		switch (opcode) {
> +		case ldptrd_op:
> +			run->mmio.len = 8;
> +			break;
> +		case ldptrw_op:
> +			run->mmio.len = 4;
> +			break;
> +		default:
> +			break;
> +		}
> +	} else if (op8 < 0x2f) {
> +		/* ld.b/h/w/d, ld.bu/hu/wu process */
> +		rd = inst.reg2i12_format.rd;
> +		opcode = inst.reg2i12_format.opcode;
> +
> +		switch (opcode) {
> +		case ldd_op:
> +			run->mmio.len = 8;
> +			break;
> +		case ldwu_op:
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			run->mmio.len = 4;
> +			break;
> +		case ldw_op:
> +			run->mmio.len = 4;
> +			break;
> +		case ldhu_op:
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			run->mmio.len = 2;
> +			break;
> +		case ldh_op:
> +			run->mmio.len = 2;
> +			break;
> +		case ldbu_op:
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			run->mmio.len = 1;
> +			break;
> +		case ldb_op:
> +			run->mmio.len = 1;
> +			break;
> +		default:
> +			ret = EMULATE_FAIL;
> +			break;
> +		}
> +	} else if (op8 == 0x38) {
> +		/* ldxb/h/w/d, ldxb/h/wu, ldgtb/h/w/d, ldleb/h/w/d process */
> +		rd = inst.reg3_format.rd;
> +		opcode = inst.reg3_format.opcode;
> +
> +		switch (opcode) {
> +		case ldxb_op:
> +			run->mmio.len = 1;
> +			break;
> +		case ldxbu_op:
> +			run->mmio.len = 1;
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			break;
> +		case ldxh_op:
> +			run->mmio.len = 2;
> +			break;
> +		case ldxhu_op:
> +			run->mmio.len = 2;
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			break;
> +		case ldxw_op:
> +			run->mmio.len = 4;
> +			break;
> +		case ldxwu_op:
> +			run->mmio.len = 4;
> +			vcpu->mmio_needed = 1;	/* unsigned */
> +			break;
> +		case ldxd_op:
> +			run->mmio.len = 8;
> +			break;
> +		default:
> +			ret = EMULATE_FAIL;
> +			break;
> +		}
> +	} else
> +		ret = EMULATE_FAIL;
> +
> +	if (ret == EMULATE_DO_MMIO) {
> +		/* Set for _kvm_complete_mmio_read use */
> +		vcpu->arch.io_gpr = rd;
> +		run->mmio.is_write = 0;
> +		vcpu->mmio_is_write = 0;
> +	} else {
> +		kvm_err("Load not supporded inst=0x%08x @%lx BadVaddr:%#lx\n",
> +			inst.word, vcpu->arch.pc, vcpu->arch.badv);
> +		kvm_arch_vcpu_dump_regs(vcpu);
> +		vcpu->mmio_needed = 0;
> +	}
> +	return ret;
> +}
> +
> +int _kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run)
> +{
> +	unsigned long *gpr = &vcpu->arch.gprs[vcpu->arch.io_gpr];
> +	enum emulation_result er = EMULATE_DONE;
> +
> +	/* update with new PC */
> +	update_pc(&vcpu->arch);
> +	switch (run->mmio.len) {
> +	case 8:
> +		*gpr = *(s64 *)run->mmio.data;
> +		break;
> +	case 4:
> +		if (vcpu->mmio_needed == 2)
> +			*gpr = *(int *)run->mmio.data;
> +		else
> +			*gpr = *(unsigned int *)run->mmio.data;
> +		break;
> +	case 2:
> +		if (vcpu->mmio_needed == 2)
> +			*gpr = *(short *) run->mmio.data;
> +		else
> +			*gpr = *(unsigned short *)run->mmio.data;
> +
> +		break;
> +	case 1:
> +		if (vcpu->mmio_needed == 2)
> +			*gpr = *(char *) run->mmio.data;
> +		else
> +			*gpr = *(unsigned char *) run->mmio.data;
> +		break;
> +	default:
> +		kvm_err("Bad MMIO length: %d,addr is 0x%lx",
> +				run->mmio.len, vcpu->arch.badv);
> +		er = EMULATE_FAIL;
> +		break;
> +	}
> +
> +	return er;
> +}
> +
>  static int _kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
>  {
>  	enum emulation_result er = EMULATE_DONE;
> @@ -323,3 +582,52 @@ static int _kvm_handle_gspr(struct kvm_vcpu *vcpu)
>  	}
>  	return ret;
>  }
> +
> +static int _kvm_handle_mmu_fault(struct kvm_vcpu *vcpu, bool write)
> +{
> +	struct kvm_run *run = vcpu->run;
> +	unsigned long badv = vcpu->arch.badv;
> +	larch_inst inst;
> +	enum emulation_result er = EMULATE_DONE;
> +	int ret;
> +
> +	ret = kvm_handle_mm_fault(vcpu, badv, write);
> +	if (ret) {
> +		/* Treat as MMIO */
> +		inst.word = vcpu->arch.badi;
> +		if (write) {
> +			er = _kvm_emu_mmio_write(vcpu, inst);
> +		} else {
> +			/* A code fetch fault doesn't count as an MMIO */
> +			if (kvm_is_ifetch_fault(&vcpu->arch)) {
> +				kvm_err("%s ifetch error addr:%lx\n", __func__, badv);
> +				run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
> +				return RESUME_HOST;
> +			}
> +
> +			er = _kvm_emu_mmio_read(vcpu, inst);
> +		}
> +	}
> +
> +	if (er == EMULATE_DONE) {
> +		ret = RESUME_GUEST;
> +	} else if (er == EMULATE_DO_MMIO) {
> +		run->exit_reason = KVM_EXIT_MMIO;
> +		ret = RESUME_HOST;
> +	} else {
> +		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
> +		ret = RESUME_HOST;
> +	}
> +
> +	return ret;
> +}
> +
> +static int _kvm_handle_write_fault(struct kvm_vcpu *vcpu)
> +{
> +	return _kvm_handle_mmu_fault(vcpu, true);
> +}
> +
> +static int _kvm_handle_read_fault(struct kvm_vcpu *vcpu)
> +{
> +	return _kvm_handle_mmu_fault(vcpu, false);
> +}

diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c
index 26283a9d3c6d..1237ceb06d0c 100644
--- a/arch/loongarch/kvm/exit.c
+++ b/arch/loongarch/kvm/exit.c
@@ -209,6 +209,265 @@  int _kvm_emu_idle(struct kvm_vcpu *vcpu)
 	return EMULATE_DONE;
 }
 
+int _kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)
+{
+	struct kvm_run *run = vcpu->run;
+	unsigned int rd, op8, opcode;
+	unsigned long rd_val = 0;
+	void *data = run->mmio.data;
+	unsigned long curr_pc;
+	int ret;
+
+	/*
+	 * Update PC and hold onto current PC in case there is
+	 * an error and we want to rollback the PC
+	 */
+	curr_pc = vcpu->arch.pc;
+	update_pc(&vcpu->arch);
+
+	op8 = (inst.word >> 24) & 0xff;
+	run->mmio.phys_addr = vcpu->arch.badv;
+	ret = EMULATE_DO_MMIO;
+	if (op8 < 0x28) {
+		/* stptrw/d process */
+		rd = inst.reg2i14_format.rd;
+		opcode = inst.reg2i14_format.opcode;
+
+		switch (opcode) {
+		case stptrd_op:
+			run->mmio.len = 8;
+			*(unsigned long *)data = vcpu->arch.gprs[rd];
+			break;
+		case stptrw_op:
+			run->mmio.len = 4;
+			*(unsigned int *)data = vcpu->arch.gprs[rd];
+			break;
+		default:
+			ret = EMULATE_FAIL;
+			break;
+		}
+	} else if (op8 < 0x30) {
+		/* st.b/h/w/d  process */
+		rd = inst.reg2i12_format.rd;
+		opcode = inst.reg2i12_format.opcode;
+		rd_val = vcpu->arch.gprs[rd];
+
+		switch (opcode) {
+		case std_op:
+			run->mmio.len = 8;
+			*(unsigned long *)data = rd_val;
+			break;
+		case stw_op:
+			run->mmio.len = 4;
+			*(unsigned int *)data = rd_val;
+			break;
+		case sth_op:
+			run->mmio.len = 2;
+			*(unsigned short *)data = rd_val;
+			break;
+		case stb_op:
+			run->mmio.len = 1;
+			*(unsigned char *)data = rd_val;
+			break;
+		default:
+			ret = EMULATE_FAIL;
+			break;
+		}
+	} else if (op8 == 0x38) {
+		/* stxb/h/w/d process */
+		rd = inst.reg3_format.rd;
+		opcode = inst.reg3_format.opcode;
+
+		switch (opcode) {
+		case stxb_op:
+			run->mmio.len = 1;
+			*(unsigned char *)data = vcpu->arch.gprs[rd];
+			break;
+		case stxh_op:
+			run->mmio.len = 2;
+			*(unsigned short *)data = vcpu->arch.gprs[rd];
+			break;
+		case stxw_op:
+			run->mmio.len = 4;
+			*(unsigned int *)data = vcpu->arch.gprs[rd];
+			break;
+		case stxd_op:
+			run->mmio.len = 8;
+			*(unsigned long *)data = vcpu->arch.gprs[rd];
+			break;
+		default:
+			ret = EMULATE_FAIL;
+			break;
+		}
+	} else
+		ret = EMULATE_FAIL;
+
+	if (ret == EMULATE_DO_MMIO) {
+		run->mmio.is_write = 1;
+		vcpu->mmio_needed = 1;
+		vcpu->mmio_is_write = 1;
+	} else {
+		vcpu->arch.pc = curr_pc;
+		kvm_err("Write not supporded inst=0x%08x @%lx BadVaddr:%#lx\n",
+			inst.word, vcpu->arch.pc, vcpu->arch.badv);
+		kvm_arch_vcpu_dump_regs(vcpu);
+		/* Rollback PC if emulation was unsuccessful */
+	}
+
+	return ret;
+}
+
+int _kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)
+{
+	unsigned int op8, opcode, rd;
+	struct kvm_run *run = vcpu->run;
+	int ret;
+
+	run->mmio.phys_addr = vcpu->arch.badv;
+	vcpu->mmio_needed = 2;	/* signed */
+	op8 = (inst.word >> 24) & 0xff;
+	ret = EMULATE_DO_MMIO;
+
+	if (op8 < 0x28) {
+		/* ldptr.w/d process */
+		rd = inst.reg2i14_format.rd;
+		opcode = inst.reg2i14_format.opcode;
+
+		switch (opcode) {
+		case ldptrd_op:
+			run->mmio.len = 8;
+			break;
+		case ldptrw_op:
+			run->mmio.len = 4;
+			break;
+		default:
+			break;
+		}
+	} else if (op8 < 0x2f) {
+		/* ld.b/h/w/d, ld.bu/hu/wu process */
+		rd = inst.reg2i12_format.rd;
+		opcode = inst.reg2i12_format.opcode;
+
+		switch (opcode) {
+		case ldd_op:
+			run->mmio.len = 8;
+			break;
+		case ldwu_op:
+			vcpu->mmio_needed = 1;	/* unsigned */
+			run->mmio.len = 4;
+			break;
+		case ldw_op:
+			run->mmio.len = 4;
+			break;
+		case ldhu_op:
+			vcpu->mmio_needed = 1;	/* unsigned */
+			run->mmio.len = 2;
+			break;
+		case ldh_op:
+			run->mmio.len = 2;
+			break;
+		case ldbu_op:
+			vcpu->mmio_needed = 1;	/* unsigned */
+			run->mmio.len = 1;
+			break;
+		case ldb_op:
+			run->mmio.len = 1;
+			break;
+		default:
+			ret = EMULATE_FAIL;
+			break;
+		}
+	} else if (op8 == 0x38) {
+		/* ldxb/h/w/d, ldxb/h/wu, ldgtb/h/w/d, ldleb/h/w/d process */
+		rd = inst.reg3_format.rd;
+		opcode = inst.reg3_format.opcode;
+
+		switch (opcode) {
+		case ldxb_op:
+			run->mmio.len = 1;
+			break;
+		case ldxbu_op:
+			run->mmio.len = 1;
+			vcpu->mmio_needed = 1;	/* unsigned */
+			break;
+		case ldxh_op:
+			run->mmio.len = 2;
+			break;
+		case ldxhu_op:
+			run->mmio.len = 2;
+			vcpu->mmio_needed = 1;	/* unsigned */
+			break;
+		case ldxw_op:
+			run->mmio.len = 4;
+			break;
+		case ldxwu_op:
+			run->mmio.len = 4;
+			vcpu->mmio_needed = 1;	/* unsigned */
+			break;
+		case ldxd_op:
+			run->mmio.len = 8;
+			break;
+		default:
+			ret = EMULATE_FAIL;
+			break;
+		}
+	} else
+		ret = EMULATE_FAIL;
+
+	if (ret == EMULATE_DO_MMIO) {
+		/* Set for _kvm_complete_mmio_read use */
+		vcpu->arch.io_gpr = rd;
+		run->mmio.is_write = 0;
+		vcpu->mmio_is_write = 0;
+	} else {
+		kvm_err("Load not supporded inst=0x%08x @%lx BadVaddr:%#lx\n",
+			inst.word, vcpu->arch.pc, vcpu->arch.badv);
+		kvm_arch_vcpu_dump_regs(vcpu);
+		vcpu->mmio_needed = 0;
+	}
+	return ret;
+}
+
+int _kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run)
+{
+	unsigned long *gpr = &vcpu->arch.gprs[vcpu->arch.io_gpr];
+	enum emulation_result er = EMULATE_DONE;
+
+	/* update with new PC */
+	update_pc(&vcpu->arch);
+	switch (run->mmio.len) {
+	case 8:
+		*gpr = *(s64 *)run->mmio.data;
+		break;
+	case 4:
+		if (vcpu->mmio_needed == 2)
+			*gpr = *(int *)run->mmio.data;
+		else
+			*gpr = *(unsigned int *)run->mmio.data;
+		break;
+	case 2:
+		if (vcpu->mmio_needed == 2)
+			*gpr = *(short *) run->mmio.data;
+		else
+			*gpr = *(unsigned short *)run->mmio.data;
+
+		break;
+	case 1:
+		if (vcpu->mmio_needed == 2)
+			*gpr = *(char *) run->mmio.data;
+		else
+			*gpr = *(unsigned char *) run->mmio.data;
+		break;
+	default:
+		kvm_err("Bad MMIO length: %d,addr is 0x%lx",
+				run->mmio.len, vcpu->arch.badv);
+		er = EMULATE_FAIL;
+		break;
+	}
+
+	return er;
+}
+
 static int _kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
 {
 	enum emulation_result er = EMULATE_DONE;
@@ -323,3 +582,52 @@  static int _kvm_handle_gspr(struct kvm_vcpu *vcpu)
 	}
 	return ret;
 }
+
+static int _kvm_handle_mmu_fault(struct kvm_vcpu *vcpu, bool write)
+{
+	struct kvm_run *run = vcpu->run;
+	unsigned long badv = vcpu->arch.badv;
+	larch_inst inst;
+	enum emulation_result er = EMULATE_DONE;
+	int ret;
+
+	ret = kvm_handle_mm_fault(vcpu, badv, write);
+	if (ret) {
+		/* Treat as MMIO */
+		inst.word = vcpu->arch.badi;
+		if (write) {
+			er = _kvm_emu_mmio_write(vcpu, inst);
+		} else {
+			/* A code fetch fault doesn't count as an MMIO */
+			if (kvm_is_ifetch_fault(&vcpu->arch)) {
+				kvm_err("%s ifetch error addr:%lx\n", __func__, badv);
+				run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+				return RESUME_HOST;
+			}
+
+			er = _kvm_emu_mmio_read(vcpu, inst);
+		}
+	}
+
+	if (er == EMULATE_DONE) {
+		ret = RESUME_GUEST;
+	} else if (er == EMULATE_DO_MMIO) {
+		run->exit_reason = KVM_EXIT_MMIO;
+		ret = RESUME_HOST;
+	} else {
+		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+		ret = RESUME_HOST;
+	}
+
+	return ret;
+}
+
+static int _kvm_handle_write_fault(struct kvm_vcpu *vcpu)
+{
+	return _kvm_handle_mmu_fault(vcpu, true);
+}
+
+static int _kvm_handle_read_fault(struct kvm_vcpu *vcpu)
+{
+	return _kvm_handle_mmu_fault(vcpu, false);
+}

[v12,24/31] LoongArch: KVM: Implement handle mmio exception

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