diff mbox series

[v4,4/8] target/i386/intel-pt: print special message for INTEL_PT_ADDR_RANGES_NUM

Message ID 20230531084311.3807277-5-xiaoyao.li@intel.com (mailing list archive)
State New, archived
Headers show
Series i386: Make Intel PT configurable | expand

Commit Message

Xiaoyao Li May 31, 2023, 8:43 a.m. UTC 
Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL
PT ADDR RANGES. For unsupported value that exceeds what KVM reports,
report it as a whole in mark_unavailable_features() as well.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
 target/i386/cpu.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index e735c366bc97..03471efee66b 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4888,7 +4888,14 @@  static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint64_t mask,
         return;
     }
 
-    for (i = 0; i < 64; ++i) {
+    if ((w == FEAT_14_1_EAX) && (mask & INTEL_PT_ADDR_RANGES_NUM_MASK)) {
+        warn_report("%s: CPUID.14H_01H:EAX [bit 2:0]", verbose_prefix);
+        i = 3;
+    } else {
+        i = 0;
+    }
+
+    for (; i < 64; ++i) {
         if ((1ULL << i) & mask) {
             g_autofree char *feat_word_str = feature_word_description(f, i);
             warn_report("%s: %s%s%s [bit %d]",