From patchwork Mon Jun 12 05:39:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 13275610 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC1E0C7EE23 for ; Mon, 12 Jun 2023 05:40:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236281AbjFLFkj (ORCPT ); Mon, 12 Jun 2023 01:40:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235824AbjFLFkD (ORCPT ); Mon, 12 Jun 2023 01:40:03 -0400 Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67492E67 for ; Sun, 11 Jun 2023 22:39:57 -0700 (PDT) Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-19f8af9aa34so2433557fac.1 for ; Sun, 11 Jun 2023 22:39:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1686548393; x=1689140393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O5HbPVR3QtNXxU1oKHkD/V666BtdibNb7IDtcLf2Zqk=; b=QajJYa9QoTEHD/yYxnDPcawzXqqnQnmuLT8Kw8H/4KK2ECidGvM36nKjdds7OJR+sn yC3LsW02F/8LIl44ONYuLP/3OOk+vtePSdreKkGHTpGBMhn4osn68ugx/We//EpvXTsy DDa8PThHxL42OrPjon69ohpU9grQHjHifSKpePc/uLGxZz9DrEEknKxGPkQUMeaISzaU jIJH+xXUFXJflGXD1mLLWBQKvGzZG6wmPOd0U1SpFqGRp5e7A1c9cGXQkoXCs1IfC0x8 PWkKpU4O3gkB5Gu56BrmqIcnb0cltpjtKcH6szWt8AWbKcgIHNVB8N29V0saGTN53/Zw 4AfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686548393; x=1689140393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O5HbPVR3QtNXxU1oKHkD/V666BtdibNb7IDtcLf2Zqk=; b=COOGt1WHLkOMl2hnGtRNVGYl/dGNHtEnlKOVj9zHWuNWqrq1BJJYgNkx/f+t/GBsB9 QPorSW86wFB2Nss2zhx4yH8S1E6yIVoXWob4KrjXuUQcNDrY5uHA8uDY3PCRAg8CqI7v mJm1s1X3rkytVxbAb5Dc6xcNLHdjkLFX1fve2jHy5oIfFfInfgY/xDbIxFXMhEhRnus6 NnfsZCkRlWbZkEypx8p7OFLKb8HEh/ylsdPtmUOJzvJUK3PmE8ymM85qnD7oEgeD2n/I +yo9DckAaEKfziuxJGZDuuLB4tKF9szKagUQphjTg624rEKUSXDYPB30cEodfpApsIzX riNA== X-Gm-Message-State: AC+VfDy8MMcnhhR4aigDLbbtcHaMo9fGmxNnXE77r5gpcxGQV5TOUt4d 9Dt6K9aspnvsWTOLFG527+lgsw== X-Google-Smtp-Source: ACHHUZ405rOJxSDSxLbeGiqOzwinOWwn+/amhGI3Cdn79CxDkbbvcTTQFANnLEtHuYBSlFaqJ0cJPg== X-Received: by 2002:a05:6870:4c3:b0:177:dfdb:63 with SMTP id u3-20020a05687004c300b00177dfdb0063mr5371977oam.44.1686548392701; Sun, 11 Jun 2023 22:39:52 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([103.97.165.210]) by smtp.gmail.com with ESMTPSA id lv19-20020a056871439300b001a30d846520sm5534869oab.7.2023.06.11.22.39.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 22:39:52 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Andrew Jones , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Atish Patra Subject: [PATCH v2 02/10] RISC-V: KVM: Add IMSIC related defines Date: Mon, 12 Jun 2023 11:09:24 +0530 Message-Id: <20230612053932.58604-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230612053932.58604-1-apatel@ventanamicro.com> References: <20230612053932.58604-1-apatel@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We add IMSIC related defines in a separate header so that different parts of KVM code can share it. Once AIA drivers are merged will have a common IMSIC header shared by both KVM and IRQCHIP driver. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_aia_imsic.h | 38 ++++++++++++++++++++++++++ arch/riscv/kvm/aia.c | 3 +- 2 files changed, 39 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/kvm_aia_imsic.h diff --git a/arch/riscv/include/asm/kvm_aia_imsic.h b/arch/riscv/include/asm/kvm_aia_imsic.h new file mode 100644 index 000000000000..da5881d2bde0 --- /dev/null +++ b/arch/riscv/include/asm/kvm_aia_imsic.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2021 Western Digital Corporation or its affiliates. + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ +#ifndef __KVM_RISCV_AIA_IMSIC_H +#define __KVM_RISCV_AIA_IMSIC_H + +#include +#include + +#define IMSIC_MMIO_PAGE_SHIFT 12 +#define IMSIC_MMIO_PAGE_SZ (1UL << IMSIC_MMIO_PAGE_SHIFT) +#define IMSIC_MMIO_PAGE_LE 0x00 +#define IMSIC_MMIO_PAGE_BE 0x04 + +#define IMSIC_MIN_ID 63 +#define IMSIC_MAX_ID 2048 + +#define IMSIC_EIDELIVERY 0x70 + +#define IMSIC_EITHRESHOLD 0x72 + +#define IMSIC_EIP0 0x80 +#define IMSIC_EIP63 0xbf +#define IMSIC_EIPx_BITS 32 + +#define IMSIC_EIE0 0xc0 +#define IMSIC_EIE63 0xff +#define IMSIC_EIEx_BITS 32 + +#define IMSIC_FIRST IMSIC_EIDELIVERY +#define IMSIC_LAST IMSIC_EIE63 + +#define IMSIC_MMIO_SETIPNUM_LE 0x00 +#define IMSIC_MMIO_SETIPNUM_BE 0x04 + +#endif diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 1cee75a8c883..c78c06d99e39 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -15,6 +15,7 @@ #include #include #include +#include struct aia_hgei_control { raw_spinlock_t lock; @@ -364,8 +365,6 @@ static int aia_rmw_iprio(struct kvm_vcpu *vcpu, unsigned int isel, return KVM_INSN_CONTINUE_NEXT_SEPC; } -#define IMSIC_FIRST 0x70 -#define IMSIC_LAST 0xff int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num, unsigned long *val, unsigned long new_val, unsigned long wr_mask)