From patchwork Thu Jun 15 07:33:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 13280824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEEE5EB64DB for ; Thu, 15 Jun 2023 07:35:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244415AbjFOHf2 (ORCPT ); Thu, 15 Jun 2023 03:35:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245034AbjFOHer (ORCPT ); Thu, 15 Jun 2023 03:34:47 -0400 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31ECD2969 for ; Thu, 15 Jun 2023 00:34:10 -0700 (PDT) Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-1b51414b080so5055105ad.0 for ; Thu, 15 Jun 2023 00:34:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1686814449; x=1689406449; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O5HbPVR3QtNXxU1oKHkD/V666BtdibNb7IDtcLf2Zqk=; b=KIN1D7FID2JoNlDH8zGF4bkh2OCtJTdH1POzUKXCdInIE6fpu38dhi8pwZLanO/eFa VzXCrDUEf5hhdTHu0TZr3iVwRi9OQtSumjS9PKZSj6A5UdojcJHtY/wWY+mPfWQQ7jrW sopEXgToYFzpCh9PQzUgj+/aDA85niWpcabbBpemUrsdbIqb7ViqrdFweXQAyoad1W+c /1jGNK4aqPvp5yjD1NOAsrMDtFr7lEO5JnraRTPPIwynEFPZLUa3b32r/mAiL4YeIjcG yJjNaG4gmSXWsO+tvWLUiE1jFsDIZ2UigSbTJnmRztc653D4YDyIVLdxTeqiN8JiXFH3 sQYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686814449; x=1689406449; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O5HbPVR3QtNXxU1oKHkD/V666BtdibNb7IDtcLf2Zqk=; b=Ck4BIpoB0c4DDeyBD5cw6wj2oDlEf+rrKK1wbabIDgIefi+ZRM5NpuPglRbYMLLjDw IvBbYhv8T2kCnm7i5IYJvwTP9DDcDgxxsUQbLEkPrN9tNUyOYQ6Z6K3H4uoG0UPY6Fet fYcuzSk0jOHIlu8fcX5TRomG17sWRoPSpM+LsOYtFYQ3CXlAoBGq7Hrw+d4sXcY1pVlO znXOyJQP1m9g0RY8Da89Z+fMxbtD6G/49Gij3RhOfyuh6ndBOngfiFoM1D5Qg1UuBaFN Uxn8+a3m7/gGoAU87pkRPICx3G/G0SEjFEE+VXsHizb3M6UQX81z42Q3XgQXKQidKmvb mpGw== X-Gm-Message-State: AC+VfDw3j+Jl7jJTHymNaam/YsnBeUlNmndlRcCFXUIGCYdYWe+N0ADj lfIhr7CJGdCqrSJYnmcWikdGpQ== X-Google-Smtp-Source: ACHHUZ4WHHdbev9KkvtpUlC2u1yPsievjxeS0pSrfXL0jG8l30ecmSB7b61z1U+MRLZr4dJIybMHtg== X-Received: by 2002:a17:902:7597:b0:1b3:bbe3:25a8 with SMTP id j23-20020a170902759700b001b3bbe325a8mr10233865pll.55.1686814449238; Thu, 15 Jun 2023 00:34:09 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([106.51.83.242]) by smtp.gmail.com with ESMTPSA id ji1-20020a170903324100b001b016313b1dsm8049855plb.86.2023.06.15.00.34.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jun 2023 00:34:08 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Andrew Jones , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Atish Patra Subject: [PATCH v3 02/10] RISC-V: KVM: Add IMSIC related defines Date: Thu, 15 Jun 2023 13:03:45 +0530 Message-Id: <20230615073353.85435-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615073353.85435-1-apatel@ventanamicro.com> References: <20230615073353.85435-1-apatel@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We add IMSIC related defines in a separate header so that different parts of KVM code can share it. Once AIA drivers are merged will have a common IMSIC header shared by both KVM and IRQCHIP driver. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_aia_imsic.h | 38 ++++++++++++++++++++++++++ arch/riscv/kvm/aia.c | 3 +- 2 files changed, 39 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/kvm_aia_imsic.h diff --git a/arch/riscv/include/asm/kvm_aia_imsic.h b/arch/riscv/include/asm/kvm_aia_imsic.h new file mode 100644 index 000000000000..da5881d2bde0 --- /dev/null +++ b/arch/riscv/include/asm/kvm_aia_imsic.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2021 Western Digital Corporation or its affiliates. + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ +#ifndef __KVM_RISCV_AIA_IMSIC_H +#define __KVM_RISCV_AIA_IMSIC_H + +#include +#include + +#define IMSIC_MMIO_PAGE_SHIFT 12 +#define IMSIC_MMIO_PAGE_SZ (1UL << IMSIC_MMIO_PAGE_SHIFT) +#define IMSIC_MMIO_PAGE_LE 0x00 +#define IMSIC_MMIO_PAGE_BE 0x04 + +#define IMSIC_MIN_ID 63 +#define IMSIC_MAX_ID 2048 + +#define IMSIC_EIDELIVERY 0x70 + +#define IMSIC_EITHRESHOLD 0x72 + +#define IMSIC_EIP0 0x80 +#define IMSIC_EIP63 0xbf +#define IMSIC_EIPx_BITS 32 + +#define IMSIC_EIE0 0xc0 +#define IMSIC_EIE63 0xff +#define IMSIC_EIEx_BITS 32 + +#define IMSIC_FIRST IMSIC_EIDELIVERY +#define IMSIC_LAST IMSIC_EIE63 + +#define IMSIC_MMIO_SETIPNUM_LE 0x00 +#define IMSIC_MMIO_SETIPNUM_BE 0x04 + +#endif diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 1cee75a8c883..c78c06d99e39 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -15,6 +15,7 @@ #include #include #include +#include struct aia_hgei_control { raw_spinlock_t lock; @@ -364,8 +365,6 @@ static int aia_rmw_iprio(struct kvm_vcpu *vcpu, unsigned int isel, return KVM_INSN_CONTINUE_NEXT_SEPC; } -#define IMSIC_FIRST 0x70 -#define IMSIC_LAST 0xff int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num, unsigned long *val, unsigned long new_val, unsigned long wr_mask)