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[1/6] KVM: Documentation: Add the missing guest_mode in kvm_mmu_page_role

Message ID 20230618000856.1714902-2-mizhang@google.com (mailing list archive)
State New, archived
Headers show
Series KVM: Documentation: Update document description for kvm_mmu_page and kvm_mmu_page_role | expand

Commit Message

Mingwei Zhang June 18, 2023, 12:08 a.m. UTC
Add the missing guest_mode in kvm_mmu_page_role description. guest_mode
tells KVM whether a shadow page is used for the L1 or an L2. Update the
missing field in documentation.

Signed-off-by: Mingwei Zhang <mizhang@google.com>
---
 Documentation/virt/kvm/x86/mmu.rst | 2 ++
 1 file changed, 2 insertions(+)

Comments

Huang, Kai June 22, 2023, 8:22 a.m. UTC | #1
On Sun, 2023-06-18 at 00:08 +0000, Mingwei Zhang wrote:
> Add the missing guest_mode in kvm_mmu_page_role description. guest_mode
> tells KVM whether a shadow page is used for the L1 or an L2. Update the
> missing field in documentation.
> 
> Signed-off-by: Mingwei Zhang <mizhang@google.com>
> ---
>  Documentation/virt/kvm/x86/mmu.rst | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst
> index 8364afa228ec..561efa8ec7d7 100644
> --- a/Documentation/virt/kvm/x86/mmu.rst
> +++ b/Documentation/virt/kvm/x86/mmu.rst
> @@ -202,6 +202,8 @@ Shadow pages contain the following information:
>      Is 1 if the MMU instance cannot use A/D bits.  EPT did not have A/D
>      bits before Haswell; shadow EPT page tables also cannot use A/D bits
>      if the L1 hypervisor does not enable them.
> +  role.guest_mode:
> +    Indicates the shadow page is created for a nested guest.
>    role.passthrough:
>      The page is not backed by a guest page table, but its first entry
>      points to one.  This is set if NPT uses 5-level page tables (host

Reviewed-by: Kai Huang <kai.huang@intel.com>
diff mbox series

Patch

diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst
index 8364afa228ec..561efa8ec7d7 100644
--- a/Documentation/virt/kvm/x86/mmu.rst
+++ b/Documentation/virt/kvm/x86/mmu.rst
@@ -202,6 +202,8 @@  Shadow pages contain the following information:
     Is 1 if the MMU instance cannot use A/D bits.  EPT did not have A/D
     bits before Haswell; shadow EPT page tables also cannot use A/D bits
     if the L1 hypervisor does not enable them.
+  role.guest_mode:
+    Indicates the shadow page is created for a nested guest.
   role.passthrough:
     The page is not backed by a guest page table, but its first entry
     points to one.  This is set if NPT uses 5-level page tables (host