From patchwork Wed Jul 12 11:41:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 023B0C00528 for ; Wed, 12 Jul 2023 11:42:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232126AbjGLLmc (ORCPT ); Wed, 12 Jul 2023 07:42:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230360AbjGLLm1 (ORCPT ); Wed, 12 Jul 2023 07:42:27 -0400 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFF381FF0; Wed, 12 Jul 2023 04:42:04 -0700 (PDT) Received: from pps.filterd (m0356516.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36CBO9vd022079; Wed, 12 Jul 2023 11:41:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=5Ag/O7nDGGmEGDvXtVSskH1+1ROquJpsIcGYPeZI/lM=; b=MxESNKiWFr1KXH7GeIz66vpvNdStRLuzrGEBRfiMWJumTFfIqt+S7Iti7UUDN37X4o4h 5QYMD0cJgePFMP2T4T80EJMGW5NBh2I65rf9O2Xm77IojSIOYyiauSqxh4ARz2LpLs4z WCRjwVZQBHw2tfJ9cmvQNJF2fHOOba4+rahPJH6LMcDDMxqGz66r9dgYMiy/I7nXqrJm X9CWxOrmiwZoHPReFdFLjRql/WIlUvvuqoEJbxpZbqCIiQKwPQS1Zil2fHKdHyodQNZH 5Fe5s7nXP/j8UG3aIwjc+qP4T6gz5YiHC4Pd3M9bCydCqzZaBoIbzpdj1nzdIAZiHgpq fQ== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rsu8v895t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:55 +0000 Received: from m0356516.ppops.net (m0356516.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 36CBcKus028201; Wed, 12 Jul 2023 11:41:55 GMT Received: from ppma06ams.nl.ibm.com (66.31.33a9.ip4.static.sl-reverse.com [169.51.49.102]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rsu8v895g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:55 +0000 Received: from pps.filterd (ppma06ams.nl.ibm.com [127.0.0.1]) by ppma06ams.nl.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 36C3Wd9E010428; Wed, 12 Jul 2023 11:41:53 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma06ams.nl.ibm.com (PPS) with ESMTPS id 3rpy2e2mpd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:53 +0000 Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 36CBfolg31523468 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0CEED2004B; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DEB6220043; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 2/6] s390x: add function to set DAT mode for all interrupts Date: Wed, 12 Jul 2023 13:41:45 +0200 Message-Id: <20230712114149.1291580-3-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ekQI-tZ3AgpdxsG2JFLQtMlWd_KcO_6X X-Proofpoint-ORIG-GUID: iQZjT_llc4fYC1NXWDCF2Uua0IWXC4Y1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 phishscore=0 mlxlogscore=536 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=0 mlxscore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When toggling DAT or switch address space modes, it is likely that interrupts should be handled in the same DAT or address space mode. Add a function which toggles DAT and address space mode for all interruptions, except restart interrupts. Signed-off-by: Nico Boehr --- lib/s390x/asm/interrupt.h | 4 ++++ lib/s390x/interrupt.c | 36 ++++++++++++++++++++++++++++++++++++ lib/s390x/mmu.c | 5 +++-- 3 files changed, 43 insertions(+), 2 deletions(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 35c1145f0349..55759002dce2 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -83,6 +83,10 @@ void expect_ext_int(void); uint16_t clear_pgm_int(void); void check_pgm_int_code(uint16_t code); +#define IRQ_DAT_ON true +#define IRQ_DAT_OFF false +void irq_set_dat_mode(bool dat, uint64_t as); + /* Activate low-address protection */ static inline void low_prot_enable(void) { diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index 3f993a363ae2..9b1bc6ce819d 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -9,6 +9,7 @@ */ #include #include +#include #include #include #include @@ -104,6 +105,41 @@ void register_ext_cleanup_func(void (*f)(struct stack_frame_int *)) THIS_CPU->ext_cleanup_func = f; } +/** + * irq_set_dat_mode - Set the DAT mode of all interrupt handlers, except for + * restart. + * This will update the DAT mode and address space mode of all interrupt new + * PSWs. + * + * Since enabling DAT needs initalized CRs and the restart new PSW is often used + * to initalize CRs, the restart new PSW is never touched to avoid the chicken + * and egg situation. + * + * @dat specifies whether to use DAT or not + * @as specifies the address space mode to use - one of AS_PRIM, AS_ACCR, + * AS_SECN or AS_HOME. + */ +void irq_set_dat_mode(bool dat, uint64_t as) +{ + struct psw* irq_psws[] = { + OPAQUE_PTR(GEN_LC_EXT_NEW_PSW), + OPAQUE_PTR(GEN_LC_SVC_NEW_PSW), + OPAQUE_PTR(GEN_LC_PGM_NEW_PSW), + OPAQUE_PTR(GEN_LC_MCCK_NEW_PSW), + OPAQUE_PTR(GEN_LC_IO_NEW_PSW), + }; + struct psw *psw; + + assert(as == AS_PRIM || as == AS_ACCR || as == AS_SECN || as == AS_HOME); + + for (size_t i = 0; i < ARRAY_SIZE(irq_psws); i++) { + psw = irq_psws[i]; + psw->dat = dat; + if (dat) + psw->as = as; + } +} + static void fixup_pgm_int(struct stack_frame_int *stack) { /* If we have an error on SIE we directly move to sie_exit */ diff --git a/lib/s390x/mmu.c b/lib/s390x/mmu.c index b474d7021d3f..199bd3fbc9c8 100644 --- a/lib/s390x/mmu.c +++ b/lib/s390x/mmu.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "mmu.h" @@ -41,8 +42,8 @@ static void mmu_enable(pgd_t *pgtable) /* enable dat (primary == 0 set as default) */ enable_dat(); - /* we can now also use DAT unconditionally in our PGM handler */ - lowcore.pgm_new_psw.mask |= PSW_MASK_DAT; + /* we can now also use DAT in all interrupt handlers */ + irq_set_dat_mode(IRQ_DAT_ON, AS_PRIM); } /*