From patchwork Mon Sep 4 08:22:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13373580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 844B2C83F33 for ; Mon, 4 Sep 2023 08:23:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241976AbjIDIXi (ORCPT ); Mon, 4 Sep 2023 04:23:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231876AbjIDIXi (ORCPT ); Mon, 4 Sep 2023 04:23:38 -0400 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 450EF11A; Mon, 4 Sep 2023 01:23:24 -0700 (PDT) Received: from pps.filterd (m0353723.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 384898Yd029526; Mon, 4 Sep 2023 08:23:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=od/8fqWTHv/humdC61E1hoXHGcos4ApgS6gzwTyQV/8=; b=eGAKN4XuZr/D7r3/FfD+/HcHtr4KKR0oz7i0Wn5nx/HaZm/npw3wn9tRJSv8cNvaKM/S HYglV80tDG5qND8CTBlWqucEH8Lzl6VqKZJvj7FiaiE2Erd2BHd6CJhTBmrOCnXro/81 Zwo0lbmLZyTEu4Fvn1bacEnqhiMhgjTdH98k6DP9WX4TzTtn5W1qVdgtO3rJr+YIop3P chqGi/C9u8GG59kenorW9NDv9ICqurk9MyhoNfCyzaAeL/+niMtKZQQQMxKmBo4qNxh0 Ou0sWj6tDUjMl9Um4mzNx8bp1Lf1UI6gQ9lm5hIbvoMgNzzDes+98Q6KfA3l63K7befT bg== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3sw830vpkx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 04 Sep 2023 08:23:23 +0000 Received: from m0353723.ppops.net (m0353723.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3848Ag7q005624; Mon, 4 Sep 2023 08:23:22 GMT Received: from ppma12.dal12v.mail.ibm.com (dc.9e.1632.ip4.static.sl-reverse.com [50.22.158.220]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3sw830vpke-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 04 Sep 2023 08:23:22 +0000 Received: from pps.filterd (ppma12.dal12v.mail.ibm.com [127.0.0.1]) by ppma12.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 3846hfXt001691; Mon, 4 Sep 2023 08:23:22 GMT Received: from smtprelay02.fra02v.mail.ibm.com ([9.218.2.226]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 3svfcs9cc4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 04 Sep 2023 08:23:22 +0000 Received: from smtpav05.fra02v.mail.ibm.com (smtpav05.fra02v.mail.ibm.com [10.20.54.104]) by smtprelay02.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3848NJtf27067024 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 4 Sep 2023 08:23:19 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 467DF20040; Mon, 4 Sep 2023 08:23:19 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 10B312004B; Mon, 4 Sep 2023 08:23:19 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 4 Sep 2023 08:23:19 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v6 1/8] lib: s390x: introduce bitfield for PSW mask Date: Mon, 4 Sep 2023 10:22:19 +0200 Message-ID: <20230904082318.1465055-2-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230904082318.1465055-1-nrb@linux.ibm.com> References: <20230904082318.1465055-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: lfTTKaNWNzMFz1mCOg3HLmngaIPaZjou X-Proofpoint-ORIG-GUID: LTP9Z82gM3ptxCoh-GlSEHXMr3r8eKIr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-04_05,2023-08-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 phishscore=0 impostorscore=0 adultscore=0 mlxlogscore=526 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309040072 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Changing the PSW mask is currently little clumsy, since there is only the PSW_MASK_* defines. This makes it hard to change e.g. only the address space in the current PSW without a lot of bit fiddling. Introduce a bitfield for the PSW mask. This makes this kind of modifications much simpler and easier to read. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Janosch Frank --- lib/s390x/asm/arch_def.h | 26 +++++++++++++++++++++++++- s390x/selftest.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 1 deletion(-) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index bb26e008cc68..5a712f97f129 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -37,12 +37,36 @@ struct stack_frame_int { }; struct psw { - uint64_t mask; + union { + uint64_t mask; + struct { + uint64_t reserved00:1; + uint64_t per:1; + uint64_t reserved02:3; + uint64_t dat:1; + uint64_t io:1; + uint64_t ext:1; + uint64_t key:4; + uint64_t reserved12:1; + uint64_t mchk:1; + uint64_t wait:1; + uint64_t pstate:1; + uint64_t as:2; + uint64_t cc:2; + uint64_t prg_mask:4; + uint64_t reserved24:7; + uint64_t ea:1; + uint64_t ba:1; + uint64_t reserved33:31; + }; + }; uint64_t addr; }; +_Static_assert(sizeof(struct psw) == 16, "PSW size"); #define PSW(m, a) ((struct psw){ .mask = (m), .addr = (uint64_t)(a) }) + struct short_psw { uint32_t mask; uint32_t addr; diff --git a/s390x/selftest.c b/s390x/selftest.c index 13fd36bc06f8..92ed4e5d35eb 100644 --- a/s390x/selftest.c +++ b/s390x/selftest.c @@ -74,6 +74,39 @@ static void test_malloc(void) report_prefix_pop(); } +static void test_psw_mask(void) +{ + uint64_t expected_key = 0xf; + struct psw test_psw = PSW(0, 0); + + report_prefix_push("PSW mask"); + test_psw.mask = PSW_MASK_DAT; + report(test_psw.dat, "DAT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_DAT, test_psw.mask); + + test_psw.mask = PSW_MASK_IO; + report(test_psw.io, "IO matches expected=0x%016lx actual=0x%016lx", PSW_MASK_IO, test_psw.mask); + + test_psw.mask = PSW_MASK_EXT; + report(test_psw.ext, "EXT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_EXT, test_psw.mask); + + test_psw.mask = expected_key << (63 - 11); + report(test_psw.key == expected_key, "PSW Key matches expected=0x%lx actual=0x%x", expected_key, test_psw.key); + + test_psw.mask = 1UL << (63 - 13); + report(test_psw.mchk, "MCHK matches"); + + test_psw.mask = PSW_MASK_WAIT; + report(test_psw.wait, "Wait matches expected=0x%016lx actual=0x%016lx", PSW_MASK_WAIT, test_psw.mask); + + test_psw.mask = PSW_MASK_PSTATE; + report(test_psw.pstate, "Pstate matches expected=0x%016lx actual=0x%016lx", PSW_MASK_PSTATE, test_psw.mask); + + test_psw.mask = PSW_MASK_64; + report(test_psw.ea && test_psw.ba, "BA/EA matches expected=0x%016lx actual=0x%016lx", PSW_MASK_64, test_psw.mask); + + report_prefix_pop(); +} + int main(int argc, char**argv) { report_prefix_push("selftest"); @@ -89,6 +122,7 @@ int main(int argc, char**argv) test_fp(); test_pgm_int(); test_malloc(); + test_psw_mask(); return report_summary(); }